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AgeCommit message (Collapse)Author
2022-12-16Fix privilege escalation while in user modeAlejandro Soto
2022-12-16Add interrupt controller to Platform DesignerAlejandro Soto
2022-12-16Implement swi (system call)Alejandro Soto
2022-12-16Implement branch history (simulation only)Alejandro Soto
2022-12-16Fix register corruption when interrupting a load-storeAlejandro Soto
2022-12-16Implement interrupt emulationAlejandro Soto
2022-12-16Implement IRQ exceptionsAlejandro Soto
2022-12-16Implement prefetch abortsAlejandro Soto
2022-12-16Implement data abortsAlejandro Soto
2022-12-10Expose cp15 signals to core toplevelAlejandro Soto
2022-12-09Implement cp15 controlAlejandro Soto
2022-12-07Fix register-indirect shiftsAlejandro Soto
2022-12-07Implement single-steppingAlejandro Soto
2022-12-06Implement breakpointsAlejandro Soto
2022-11-16Implement privilege escalationAlejandro Soto
2022-11-16Implement psr read/write logicAlejandro Soto
2022-11-16Simplify flags datapathAlejandro Soto
2022-11-16Fix final_writeback condition bugAlejandro Soto
2022-11-15Implemente byte-enable signal in storesAlejandro Soto
2022-11-15Fix false undefined exceptionAlejandro Soto
2022-11-15Implement sub-word memory accessesAlejandro Soto
2022-11-15Rewrite duplicate ldst logic as signal ldst_nextAlejandro Soto
2022-11-13Fix big Quartus state transition bugAlejandro Soto
2022-11-13Convert core state machines to Quartus-inferring RTLAlejandro Soto
2022-11-13Implement CPU haltAlejandro Soto
2022-11-13Simplify stall conditions to reflect uarch changesAlejandro Soto
2022-11-10Fix reset glitchesAlejandro Soto
2022-11-09Implement resetAlejandro Soto
2022-11-08Register decode output in a new porch stageAlejandro Soto
2022-11-08Refactor decode signals into unified insn_decode structAlejandro Soto
2022-11-07Remove false dependencies on control.issue (long combinational)Alejandro Soto
2022-11-07Rework regfile in order to remove negedge triggerAlejandro Soto
2022-11-07Quartus has not support for unique0Alejandro Soto
2022-11-07Implement multiplication controlAlejandro Soto
2022-11-06Add PSR control signal setAlejandro Soto
2022-11-06Clean-up control.svAlejandro Soto
2022-11-06Move CP15 logic out of control.svAlejandro Soto
2022-11-06Move multiplication logic out of control.svAlejandro Soto
2022-11-06Move load-store logic out of control.svAlejandro Soto
2022-11-06Split regfile read select logic out of control.svAlejandro Soto
2022-11-06Move exception logic out of control.svAlejandro Soto
2022-11-06Move flag update logic to writeback.svAlejandro Soto
2022-11-06Split ALU/shifter control logic out of control.svAlejandro Soto
2022-11-06Split branch logic out of control.svAlejandro Soto
2022-11-06Multiplex writeback control signalsAlejandro Soto
2022-11-06Split issue logic out of control.svAlejandro Soto
2022-11-01Add the cp15 subsystemAlejandro Soto
2022-11-01Add MUL control cycleAlejandro Soto
2022-11-01Replace decode enable signals with datapath signalsAlejandro Soto
2022-10-31Display undefined instruction messages in simulationAlejandro Soto
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