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| author | Alejandro Soto <alejandro@34project.org> | 2022-12-18 13:19:55 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-12-18 13:19:55 -0600 |
| commit | 46eae9622ab6f1a39c6253dc0998e03c57513510 (patch) | |
| tree | f9eb98da738e00f16bf7493ea9a4061dec9645f9 /rtl/core/control/control.sv | |
| parent | 6d458ad9629268ecfc69881b4fb10dca0498fbd0 (diff) | |
Implement mode-translated memory accesses
Diffstat (limited to 'rtl/core/control/control.sv')
| -rw-r--r-- | rtl/core/control/control.sv | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv index a421572..cab47ce 100644 --- a/rtl/core/control/control.sv +++ b/rtl/core/control/control.sv @@ -61,6 +61,7 @@ module core_control output logic[3:0] mem_data_be, output logic mem_start, mem_write, + mem_user, output word mul_a, mul_b, mul_c_hi, |