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authorAlejandro Soto <alejandro@34project.org>2022-12-07 20:59:22 -0600
committerAlejandro Soto <alejandro@34project.org>2022-12-07 20:59:22 -0600
commitd6fff0eb1ce867192d30babb839fc09c30049f0b (patch)
tree9d3b5fab4ccaae51d8f5b44a2b5610507b13638e /tb/sim/shifts.py
parentd8d687ad8052809f66c0b5a36d4ca74d0a3b202c (diff)
Fix register-indirect shifts
Diffstat (limited to 'tb/sim/shifts.py')
-rw-r--r--tb/sim/shifts.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/tb/sim/shifts.py b/tb/sim/shifts.py
index 38f24a2..9923124 100644
--- a/tb/sim/shifts.py
+++ b/tb/sim/shifts.py
@@ -2,3 +2,4 @@ def final():
assert_reg(r0, 0x00015000)
assert_reg(r2, 0x00015000)
assert_reg(r3, 0xaaa9fd55)
+ assert_reg(r4, 0)