diff options
| author | Alejandro Soto <alejandro@34project.org> | 2024-05-16 01:08:04 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2024-05-24 05:58:19 -0600 |
| commit | b21c321a059e11edeece1c90d97776bb0716d7a0 (patch) | |
| tree | cb7c3e6c2a5f6fd153c3b01d61040a2c901e0ba8 /rtl/wb2axip/axim2wbsp.v | |
| parent | a6c23ba92d0c2cad9862de1cb11c19b4e06fc0e6 (diff) | |
rtl: fix quartus errors: parser, synthesis, fitter
Diffstat (limited to 'rtl/wb2axip/axim2wbsp.v')
| -rw-r--r-- | rtl/wb2axip/axim2wbsp.v | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/rtl/wb2axip/axim2wbsp.v b/rtl/wb2axip/axim2wbsp.v index fb58458..729f5ac 100644 --- a/rtl/wb2axip/axim2wbsp.v +++ b/rtl/wb2axip/axim2wbsp.v @@ -39,7 +39,7 @@ //////////////////////////////////////////////////////////////////////////////// // // -`default_nettype none +//`default_nettype none // }}} module axim2wbsp #( // {{{ @@ -47,9 +47,9 @@ module axim2wbsp #( // This is an int between 1-16 parameter C_AXI_DATA_WIDTH = 32,// Width of the AXI R&W data parameter C_AXI_ADDR_WIDTH = 28, // AXI Address width - localparam AXI_LSBS = $clog2(C_AXI_DATA_WIDTH)-3, - localparam DW = C_AXI_DATA_WIDTH, - localparam AW = C_AXI_ADDR_WIDTH - AXI_LSBS, + /*local*/parameter AXI_LSBS = $clog2(C_AXI_DATA_WIDTH)-3, + /*local*/parameter DW = C_AXI_DATA_WIDTH, + /*local*/parameter AW = C_AXI_ADDR_WIDTH - AXI_LSBS, parameter LGFIFO = 5, parameter [0:0] OPT_SWAP_ENDIANNESS = 1'b0, parameter [0:0] OPT_READONLY = 1'b0, |