diff options
| author | Alejandro Soto <alejandro@34project.org> | 2024-05-16 01:08:04 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2024-05-24 05:58:19 -0600 |
| commit | b21c321a059e11edeece1c90d97776bb0716d7a0 (patch) | |
| tree | cb7c3e6c2a5f6fd153c3b01d61040a2c901e0ba8 /rtl/wb2axip/axilsingle.v | |
| parent | a6c23ba92d0c2cad9862de1cb11c19b4e06fc0e6 (diff) | |
rtl: fix quartus errors: parser, synthesis, fitter
Diffstat (limited to 'rtl/wb2axip/axilsingle.v')
| -rw-r--r-- | rtl/wb2axip/axilsingle.v | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/rtl/wb2axip/axilsingle.v b/rtl/wb2axip/axilsingle.v index e92db40..8da2685 100644 --- a/rtl/wb2axip/axilsingle.v +++ b/rtl/wb2axip/axilsingle.v @@ -101,7 +101,7 @@ //////////////////////////////////////////////////////////////////////////////// // // -`default_nettype none +//`default_nettype none // `ifdef VERILATOR // `define FORMAL // `endif @@ -112,7 +112,7 @@ module axilsingle #( parameter NS = 16, // parameter integer C_AXI_DATA_WIDTH = 32, - localparam integer C_AXI_ADDR_WIDTH = $clog2(NS)+$clog2(C_AXI_DATA_WIDTH)-3, + /*local*/parameter integer C_AXI_ADDR_WIDTH = $clog2(NS)+$clog2(C_AXI_DATA_WIDTH)-3, // // LGFLEN specifies the log (based two) of the number of // transactions that may need to be held outstanding internally. @@ -710,5 +710,5 @@ module axilsingle #( `endif endmodule // `ifndef YOSYS -// `default_nettype wire +// //`default_nettype wire // `endif |