diff options
| author | Alejandro Soto <alejandro@34project.org> | 2024-05-16 01:08:04 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2024-05-24 05:58:19 -0600 |
| commit | b21c321a059e11edeece1c90d97776bb0716d7a0 (patch) | |
| tree | cb7c3e6c2a5f6fd153c3b01d61040a2c901e0ba8 /rtl/wb2axip/axilrd2wbsp.v | |
| parent | a6c23ba92d0c2cad9862de1cb11c19b4e06fc0e6 (diff) | |
rtl: fix quartus errors: parser, synthesis, fitter
Diffstat (limited to 'rtl/wb2axip/axilrd2wbsp.v')
| -rw-r--r-- | rtl/wb2axip/axilrd2wbsp.v | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/rtl/wb2axip/axilrd2wbsp.v b/rtl/wb2axip/axilrd2wbsp.v index 569b5e8..4ba1218 100644 --- a/rtl/wb2axip/axilrd2wbsp.v +++ b/rtl/wb2axip/axilrd2wbsp.v @@ -32,15 +32,15 @@ //////////////////////////////////////////////////////////////////////////////// // // -`default_nettype none +//`default_nettype none // }}} module axilrd2wbsp #( // {{{ parameter C_AXI_DATA_WIDTH = 32, parameter C_AXI_ADDR_WIDTH = 28, parameter AXILLSB = $clog2(C_AXI_DATA_WIDTH/8), - localparam AW = C_AXI_ADDR_WIDTH-AXILLSB, - localparam DW = C_AXI_DATA_WIDTH, + /*local*/parameter AW = C_AXI_ADDR_WIDTH-AXILLSB, + /*local*/parameter DW = C_AXI_DATA_WIDTH, parameter LGFIFO = 3 // }}} ) ( @@ -597,5 +597,5 @@ module axilrd2wbsp #( // }}} endmodule `ifndef YOSYS -`default_nettype wire +//`default_nettype wire `endif |