rtl: refactor filenames and directory hierarchy

1 files changed, 0 insertions, 24 deletions

diff --git a/rtl/core/cp15/domain.sv b/rtl/core/cp15/domain.sv
deleted file mode 100644
index de37de4..0000000
--- a/rtl/core/cp15/domain.sv
+++ /dev/null
@@ -1,24 +0,0 @@
-`include "core/uarch.sv"
-
-module core_cp15_domain
-(
-	input  logic     clk,
-	                 rst_n,
-
-	input  logic     load,
-	                 transfer,
-	input  word      write,
-
-	output word      read,
-	                 mmu_dac /*verilator public*/
-);
-
-	assign read = mmu_dac;
-
-	always @(posedge clk or negedge rst_n)
-		if(!rst_n)
-			mmu_dac <= 0;
-		else if(transfer && !load)
-			mmu_dac <= write;
-
-endmodule