diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-11-07 19:07:55 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-11-07 19:07:55 -0600 |
| commit | 4ccb96c1aaf348f677954171751b58ad8f4dccf1 (patch) | |
| tree | 50fc326e176570a151b0270d02ea99bec737315f /rtl/core/control/mul.sv | |
| parent | c67a1007045a9bf0282c26da74149723c6a2941d (diff) | |
Remove false dependencies on control.issue (long combinational)
Diffstat (limited to 'rtl/core/control/mul.sv')
| -rw-r--r-- | rtl/core/control/mul.sv | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/rtl/core/control/mul.sv b/rtl/core/control/mul.sv index c3625f8..5377045 100644 --- a/rtl/core/control/mul.sv +++ b/rtl/core/control/mul.sv @@ -36,15 +36,14 @@ module core_control_mul mul_start <= 0; unique case(next_cycle) - ISSUE: - if(issue) begin - mul <= dec.mul; - mul_add <= dec_mul.add; - mul_long <= dec_mul.long_mul; - mul_signed <= dec_mul.signed_mul; - mul_r_add_hi <= dec_mul.r_add_hi; - mul_r_add_lo <= dec_mul.r_add_lo; - end + ISSUE: begin + mul <= issue && dec.mul; + mul_add <= dec_mul.add; + mul_long <= dec_mul.long_mul; + mul_signed <= dec_mul.signed_mul; + mul_r_add_hi <= dec_mul.r_add_hi; + mul_r_add_lo <= dec_mul.r_add_lo; + end MUL: mul_start <= cycle != MUL; |