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| author | Alejandro Soto <alejandro@34project.org> | 2022-12-06 15:27:42 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-12-06 15:27:42 -0600 |
| commit | b1761b8eac5777c09723bbc8cd31cc05d8ec35ae (patch) | |
| tree | a7a50591a1b5f9d7e26a7f6797a97d9ac213879a /rtl/core/control/issue.sv | |
| parent | 064b72ae4eb22336438288a9664a37c0dd07f4bc (diff) | |
Implement breakpoints
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/control/issue.sv | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/rtl/core/control/issue.sv b/rtl/core/control/issue.sv index ffdf250..b8cf3ff 100644 --- a/rtl/core/control/issue.sv +++ b/rtl/core/control/issue.sv @@ -18,6 +18,7 @@ module core_control_issue output logic issue, undefined, + breakpoint, output ptr pc, pc_visible, next_pc_visible @@ -27,6 +28,7 @@ module core_control_issue assign valid = !next_bubble && !halt; assign issue = next_cycle.issue && dec.ctrl.execute && valid; + assign breakpoint = issue && dec.ctrl.bkpt; assign next_pc_visible = insn_pc + 2; always_ff @(posedge clk or negedge rst_n) |