From b1761b8eac5777c09723bbc8cd31cc05d8ec35ae Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Tue, 6 Dec 2022 15:27:42 -0600 Subject: Implement breakpoints --- rtl/core/control/issue.sv | 2 ++ 1 file changed, 2 insertions(+) (limited to 'rtl/core/control/issue.sv') diff --git a/rtl/core/control/issue.sv b/rtl/core/control/issue.sv index ffdf250..b8cf3ff 100644 --- a/rtl/core/control/issue.sv +++ b/rtl/core/control/issue.sv @@ -18,6 +18,7 @@ module core_control_issue output logic issue, undefined, + breakpoint, output ptr pc, pc_visible, next_pc_visible @@ -27,6 +28,7 @@ module core_control_issue assign valid = !next_bubble && !halt; assign issue = next_cycle.issue && dec.ctrl.execute && valid; + assign breakpoint = issue && dec.ctrl.bkpt; assign next_pc_visible = insn_pc + 2; always_ff @(posedge clk or negedge rst_n) -- cgit v1.2.3