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| author | Alejandro Soto <alejandro@34project.org> | 2022-12-10 19:56:19 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-12-10 19:56:19 -0600 |
| commit | 6b163a88179ac3073d22622be4991f332529c8bd (patch) | |
| tree | 5333acb096d9af9a95a40c1b7703bc087134e3fa /rtl/core/control/control.sv | |
| parent | 8026947ecdf9b023c3720b26bf257bf46f7a2805 (diff) | |
Expose cp15 signals to core toplevel
Diffstat (limited to 'rtl/core/control/control.sv')
| -rw-r--r-- | rtl/core/control/control.sv | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv index 79d6d36..3c55507 100644 --- a/rtl/core/control/control.sv +++ b/rtl/core/control/control.sv @@ -25,6 +25,7 @@ module core_control input word mul_q_hi, mul_q_lo, coproc_read, + input logic high_vectors, `ifdef VERILATOR input word insn, |