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| author | Alejandro Soto <alejandro@34project.org> | 2022-09-24 21:41:46 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-09-24 21:41:46 -0600 |
| commit | 601835e33298015cf49f0ab33a7ef3d61b003ad9 (patch) | |
| tree | 15b4dea57785ad60cf2402c34d10c60687d5f91a /rtl/core/arm810.sv | |
| parent | 80805f772cf37b13383c81135cc313bbf92068e9 (diff) | |
Implement initial decoder
Diffstat (limited to 'rtl/core/arm810.sv')
| -rw-r--r-- | rtl/core/arm810.sv | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv index cbb0244..4c72fa2 100644 --- a/rtl/core/arm810.sv +++ b/rtl/core/arm810.sv @@ -1,3 +1,5 @@ +`include "core/uarch.sv" + module arm810 ( input logic clk, @@ -14,6 +16,9 @@ module arm810 logic[31:0] insn; logic[29:0] insn_pc; + psr_flags flags; + assign flags = 4'b1010; + core_fetch #(.PREFETCH_ORDER(2)) fetch ( .flush(prefetch_flush), @@ -24,4 +29,11 @@ module arm810 .* ); + //TODO + logic execute, undefined; + core_decode decode + ( + .* + ); + endmodule |