From 601835e33298015cf49f0ab33a7ef3d61b003ad9 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sat, 24 Sep 2022 21:41:46 -0600 Subject: Implement initial decoder --- rtl/core/arm810.sv | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'rtl/core/arm810.sv') diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv index cbb0244..4c72fa2 100644 --- a/rtl/core/arm810.sv +++ b/rtl/core/arm810.sv @@ -1,3 +1,5 @@ +`include "core/uarch.sv" + module arm810 ( input logic clk, @@ -14,6 +16,9 @@ module arm810 logic[31:0] insn; logic[29:0] insn_pc; + psr_flags flags; + assign flags = 4'b1010; + core_fetch #(.PREFETCH_ORDER(2)) fetch ( .flush(prefetch_flush), @@ -24,4 +29,11 @@ module arm810 .* ); + //TODO + logic execute, undefined; + core_decode decode + ( + .* + ); + endmodule -- cgit v1.2.3