| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | __init__.py | 0 | logplain |
| -rw-r--r-- | dsp_mul.sv | 1301 | logplain |
| d--------- | gfx_shader_bind | 104 | logplain |
| -rw-r--r-- | mem_interconnect.sv | 3826 | logplain |
| -rw-r--r-- | mod.mk | 208 | logplain |
| d--------- | models | 218 | logplain |
| d--------- | sim | 1257 | logplain |
| d--------- | top | 274 | logplain |
| -rw-r--r-- | verilator.hpp | 895 | logplain |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
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