timing.sdc « w3d_de1soc « target - conspiracion - Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.

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create_clock -period 20 -name clk_clk [get_ports clk_clk]
derive_pll_clocks
derive_clock_uncertainty