if_rst_sync.sv « if_common « rtl - conspiracion - Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.

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path: root/rtl/if_common/if_rst_sync.sv

blob: 69f1b785a8024efc12057c47d8d23dd50253a192 (plain)

//FIXME: peligro
module if_rst_sync
(
	input  logic clk,
	             rst_n,

	output logic srst_n
);

	always_ff @(posedge clk or negedge rst_n)
		srst_n <= ~rst_n ? 0 : 1;

endmodule