blob: 2b9c8913c9e524778b434c19c286b30d39e3f3c9 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
|
`include "gfx/gfx_defs.sv"
module pipeline_flow
#(parameter STAGES=0)
(
input logic clk,
rst_n,
input logic in_valid,
out_ready,
output logic in_ready,
out_valid,
stall
);
logic valid[STAGES];
assign stall = !in_ready;
assign in_ready = out_ready || !out_valid;
assign out_valid = valid[STAGES - 1];
always_ff @(posedge clk or negedge rst_n)
if (!rst_n)
valid[0] <= 0;
else if (in_ready)
valid[0] <= in_valid;
genvar i;
generate
for (i = 1; i < STAGES; ++i) begin: pipeline
always_ff @(posedge clk or negedge rst_n)
if (!rst_n)
valid[i] <= 0;
else if (in_ready)
valid[i] <= valid[i - 1];
end
endgenerate
endmodule
|
