rtl/gfx/gfx_sim_debug.sv


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

module gfx_sim_debug
import gfx::*;
(
	input  logic     clk,
	                 rst_n,

	       if_axil.s axis
);

	enum int unsigned
	{
		INPUT,
		STALL
	} state;

	assign axis.rvalid = 0;
	assign axis.arready = 0;
	assign axis.awready = 1;

	always_comb
		unique case (state)
			INPUT: begin
				axis.wready = 1;
				axis.bvalid = axis.wvalid;
			end

			STALL: begin
				axis.wready = 0;
				axis.bvalid = 1;
			end
		endcase

	always_ff @(posedge clk or negedge rst_n)
		if (~rst_n)
			state <= INPUT;
		else
			unique case (state)
				INPUT:
					if (axis.wvalid) begin
						$display("%c", axis.wdata[7:0]);
						if (~axis.bready)
							state <= STALL;
					end

				STALL:
					if (axis.bready)
						state <= INPUT;
			endcase

endmodule