uarch.sv « core « rtl - conspiracion - Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.

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`ifndef CORE_UARCH_SV
`define CORE_UARCH_SV

// Decodifica como andeq r0, r0, r0
`define NOP 32'd0

typedef enum logic[1:0]
{
	ALU_ADD,
	ALU_AND,
	ALU_ORR,
	ALU_XOR
} alu_op;

`endif