core_decode_ldst_addr.sv « core « rtl - conspiracion - Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.

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path: root/rtl/core/core_decode_ldst_addr.sv

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`include "core/uarch.sv"

module core_decode_ldst_addr
(
	input  ldst_decode ldst,

	output data_decode alu
);

	assign alu.op = ldst.increment ? `ALU_ADD : `ALU_SUB;
	assign alu.rn = ldst.rn;
	assign alu.rd = ldst.rd;
	assign alu.uses_rn = 1;

endmodule