| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | axi_bus.sv | 767 | logplain |
| -rw-r--r-- | axi_timer.sv | 2706 | logplain |
| -rw-r--r-- | axi_timer_top.sv | 863 | logplain |
| -rw-r--r-- | mod.mk | 226 | logplain |
| -rw-r--r-- | testbench.py | 0 | logplain |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
| summaryrefslogtreecommitdiff |