| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | .gitignore | 372 | logplain |
| -rw-r--r-- | Makefile | 1173 | logplain |
| -rw-r--r-- | c5_pin_model_dump.txt | 4757 | logplain |
| -rw-r--r-- | conspiracion.qpf | 1334 | logplain |
| -rw-r--r-- | conspiracion.qsf | 18269 | logplain |
| -rw-r--r-- | conspiracion.sdc | 84 | logplain |
| -rw-r--r-- | conspiracion_bus_master_hw.tcl | 4522 | logplain |
| d--------- | hps | 39 | logplain |
| -rwxr-xr-x | hps_sdram_p0_all_pins.txt | 3482 | logplain |
| d--------- | nix | 39 | logplain |
| -rw-r--r-- | pitfalls.txt | 4062 | logplain |
| -rw-r--r-- | platform.qsys | 35643 | logplain |
| d--------- | rtl | 91 | logplain |
| -rw-r--r-- | soc_system.cof | 1013 | logplain |
| d--------- | tb | 220 | logplain |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
| summaryrefslogtreecommitdiff |