| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-09-18 | Fix memory simulation | Alejandro Soto |
| 2022-09-18 | Implement Avalon memory module for simulation | Alejandro Soto |
| 2022-09-18 | Update testbench | Alejandro Soto |
| 2022-09-18 | Add Avalon-MM emulator | Alejandro Soto |
| 2022-09-17 | Update project structure to match Verilator Makefile | Alejandro Soto |
| 2022-09-01 | Initial commit | Alejandro Soto |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
| summaryrefslogtreecommitdiff |