| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-11-20 | Add tick, bail signals to simulated Avalon slaves | Alejandro Soto |
| 2022-11-19 | Implement JTAG-UART input | Alejandro Soto |
| 2022-11-16 | Implement JTAG-UART tx emulation | Alejandro Soto |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
| summaryrefslogtreecommitdiff |