| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-05-24 | target/w3d_de1soc: initial commit | Alejandro Soto |
| 2024-04-27 | target/de1soc: move quartus files out of project root | Alejandro Soto |
| 2022-11-02 | Use PLL output as CPU clock | Alejandro Soto |
| 2022-10-16 | Set core clock target to 100MHz | Alejandro Soto |
| 2022-09-24 | Fix timing analysis file | Alejandro Soto |
| 2022-09-19 | Add .sdc for timing analysis | Alejandro Soto |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
| summaryrefslogtreecommitdiff |