| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-02-20 | rtl: refactor filenames and directory hierarchy | Alejandro Soto |
| 2022-12-18 | Implement mode-translated memory accesses | Alejandro Soto |
| 2022-12-16 | Implement prefetch aborts | Alejandro Soto |
| 2022-12-07 | Implement single-stepping | Alejandro Soto |
| 2022-11-10 | Fix flush-stall relationship in porch | Alejandro Soto |
| 2022-11-09 | Implement reset | Alejandro Soto |
| 2022-11-08 | Register decode output in a new porch stage | Alejandro Soto |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
| summaryrefslogtreecommitdiff |