| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-10-04 | explica mejor las transiciones de routing | Fabian Montero |
| 2023-10-04 | explica estados de routing | Fabian Montero |
| 2023-10-04 | routing and beginning cache control comments | JulianCamacho |
| 2023-10-03 | sram, offset and routing comments | JulianCamacho |
| 2023-10-03 | comentarios | JulianCamacho |
| 2023-09-25 | rtl/cache: fix writeback corruption | Alejandro Soto |
| 2023-09-25 | rtl/cache: implement wait-for-reply | Alejandro Soto |
| 2023-09-24 | rtl/cache: implement | Alejandro Soto |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
| summaryrefslogtreecommitdiff |