| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-09-24 | Fix timing analysis file | Alejandro Soto |
| 2022-09-19 | Add .sdc for timing analysis | Alejandro Soto |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
| summaryrefslogtreecommitdiff |