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-rw-r--r--conspiracion.qsf1
-rw-r--r--rtl/core/cp15/cp15.sv16
-rw-r--r--rtl/core/cp15/cyclecnt.sv23
-rw-r--r--rtl/core/cp15/map.sv1
4 files changed, 38 insertions, 3 deletions
diff --git a/conspiracion.qsf b/conspiracion.qsf
index ccbc9a9..939e1b5 100644
--- a/conspiracion.qsf
+++ b/conspiracion.qsf
@@ -227,6 +227,7 @@ set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cache.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cache_lockdown.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cp15.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cpuid.sv
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cyclecnt.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/domain.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/far.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/fsr.sv
diff --git a/rtl/core/cp15/cp15.sv b/rtl/core/cp15/cp15.sv
index 0659cad..5a482d4 100644
--- a/rtl/core/cp15/cp15.sv
+++ b/rtl/core/cp15/cp15.sv
@@ -10,7 +10,8 @@ module core_cp15
input coproc_decode dec,
input word write,
- input logic fault_register,
+ input logic halt,
+ fault_register,
fault_page,
input ptr fault_addr,
input mmu_fault_type fault_type,
@@ -31,8 +32,8 @@ module core_cp15
assign {op1, op2} = {dec.op1, dec.op2};
assign load = dec.load;
- word read_cpuid, read_syscfg, read_ttbr, read_domain,
- read_far, read_fsr, read_cache_lockdown, read_tlb_lockdown;
+ word read_cpuid, read_syscfg, read_ttbr, read_domain, read_far,
+ read_fsr, read_cache_lockdown, read_tlb_lockdown, read_cyclecnt;
core_cp15_cpuid cpuid
(
@@ -101,6 +102,12 @@ module core_cp15
.*
);
+ core_cp15_cyclecnt cyclecnt
+ (
+ .read(read_cyclecnt),
+ .*
+ );
+
always_comb
unique case(crn)
`CP15_CRN_CPUID:
@@ -127,6 +134,9 @@ module core_cp15
`CP15_CRN_TLB_LCK:
read = read_tlb_lockdown;
+ `CP15_CRN_CYCLECNT:
+ read = read_cyclecnt;
+
default:
read = {$bits(read){1'bx}};
endcase
diff --git a/rtl/core/cp15/cyclecnt.sv b/rtl/core/cp15/cyclecnt.sv
new file mode 100644
index 0000000..b079a1b
--- /dev/null
+++ b/rtl/core/cp15/cyclecnt.sv
@@ -0,0 +1,23 @@
+`include "core/uarch.sv"
+
+module core_cp15_cyclecnt
+(
+ input logic clk,
+ rst_n,
+
+ input logic halt,
+
+ output word read
+);
+
+ word cyclecnt;
+
+ assign read = cyclecnt;
+
+ always @(posedge clk or negedge rst_n)
+ if(!rst_n)
+ cyclecnt <= 0;
+ else if(!halt)
+ cyclecnt <= cyclecnt + 1;
+
+endmodule
diff --git a/rtl/core/cp15/map.sv b/rtl/core/cp15/map.sv
index 7b74967..438a5bf 100644
--- a/rtl/core/cp15/map.sv
+++ b/rtl/core/cp15/map.sv
@@ -13,6 +13,7 @@
`define CP15_CRN_TLB_LCK 4'd10
`define CP15_CRN_DMA 4'd11
`define CP15_CRN_PID 4'd13
+`define CP15_CRN_CYCLECNT 4'd15
typedef struct packed
{