diff options
| -rw-r--r-- | rtl/core/arm810.sv | 2 | ||||
| -rw-r--r-- | rtl/core/fetch/fetch.sv | 14 | ||||
| -rw-r--r-- | rtl/core/porch/porch.sv | 27 |
3 files changed, 20 insertions, 23 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv index ead6f94..083163d 100644 --- a/rtl/core/arm810.sv +++ b/rtl/core/arm810.sv @@ -14,7 +14,7 @@ module arm810 output word bus_data_wr ); - ptr fetch_insn_pc, insn_addr; + ptr fetch_insn_pc, fetch_head, insn_addr; word fetch_insn; logic stall, flush, prefetch_flush, insn_start; diff --git a/rtl/core/fetch/fetch.sv b/rtl/core/fetch/fetch.sv index dc97909..1853ee0 100644 --- a/rtl/core/fetch/fetch.sv +++ b/rtl/core/fetch/fetch.sv @@ -18,10 +18,11 @@ module core_fetch flush, output word insn, output ptr insn_pc, - addr + addr, + fetch_head ); - ptr next_pc, head, hold_addr, target; + ptr next_pc, hold_addr, target; logic fetched_valid, discard; assign flush = branch || prefetch_flush; @@ -30,20 +31,21 @@ module core_fetch core_prefetch #(.ORDER(PREFETCH_ORDER)) prefetch ( + .head(fetch_head), .fetched(fetched_valid), .* ); always_comb begin if(branch) - head = target; + fetch_head = target; else if(prefetch_flush) - head = next_pc; + fetch_head = next_pc; else - head = {30{1'bx}}; + fetch_head = {30{1'bx}}; if(flush) - addr = head; + addr = fetch_head; else if(fetch && fetched_valid) addr = hold_addr + 1; else diff --git a/rtl/core/porch/porch.sv b/rtl/core/porch/porch.sv index 2eec438..238da88 100644 --- a/rtl/core/porch/porch.sv +++ b/rtl/core/porch/porch.sv @@ -10,6 +10,7 @@ module core_porch input word fetch_insn, input ptr fetch_insn_pc, + fetch_head, input insn_decode fetch_dec, output word insn, @@ -18,16 +19,7 @@ module core_porch ); logic execute, conditional, undefined; - insn_decode nop, hold_dec; - - core_porch_conds conds - ( - .* - ); - - assign nop.ctrl.execute = 0; - assign nop.ctrl.undefined = 0; - assign nop.ctrl.conditional = 0; + insn_decode hold_dec; always_comb begin dec = hold_dec; @@ -36,17 +28,20 @@ module core_porch dec.ctrl.conditional = !flush && (dec.ctrl.conditional || conditional); end + core_porch_conds conds + ( + .* + ); + always_ff @(posedge clk or negedge rst_n) if(!rst_n) begin insn <= `NOP; insn_pc <= 0; - hold_dec <= nop; - end else if(!stall) begin - insn <= fetch_insn; + hold_dec <= {$bits(hold_dec){1'b0}}; + end else if(flush || !stall) begin + insn <= flush ? `NOP : fetch_insn; + insn_pc <= flush ? fetch_head : fetch_insn_pc; hold_dec <= fetch_dec; - - if(!flush) - insn_pc <= fetch_insn_pc; end endmodule |