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| author | Alejandro Soto <alejandro@34project.org> | 2022-12-13 21:43:25 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-12-16 16:29:10 -0600 |
| commit | 0c63c46e31642d0102542a745af6b445a9d22b3b (patch) | |
| tree | 0e8b6db18829e4a3d6c894af206f2b5257815827 /tb/vga_domain.sv | |
| parent | d564e3538a3654facc94bb4cd1ee021830dfcf52 (diff) | |
Implement interrupt controller
Diffstat (limited to 'tb/vga_domain.sv')
| -rw-r--r-- | tb/vga_domain.sv | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tb/vga_domain.sv b/tb/vga_domain.sv index d3ffbc0..0c9aac5 100644 --- a/tb/vga_domain.sv +++ b/tb/vga_domain.sv @@ -7,6 +7,7 @@ module vga_domain logic[25:0] avl_address /*verilator public*/; logic avl_read /*verilator public*/; logic avl_write /*verilator public*/; + logic avl_irq /*verilator public_flat_rw @(negedge clk_clk)*/; logic[15:0] avl_readdata /*verilator public_flat_rw @(negedge clk_clk)*/; logic[31:0] avl_writedata /*verilator public*/; logic avl_waitrequest /*verilator public_flat_rw @(negedge clk_clk)*/; |