diff options
| author | Alejandro Soto <alejandro@34project.org> | 2024-05-16 01:08:04 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2024-05-24 05:58:19 -0600 |
| commit | b21c321a059e11edeece1c90d97776bb0716d7a0 (patch) | |
| tree | cb7c3e6c2a5f6fd153c3b01d61040a2c901e0ba8 /rtl/wb2axip/axivfifo.v | |
| parent | a6c23ba92d0c2cad9862de1cb11c19b4e06fc0e6 (diff) | |
rtl: fix quartus errors: parser, synthesis, fitter
Diffstat (limited to 'rtl/wb2axip/axivfifo.v')
| -rw-r--r-- | rtl/wb2axip/axivfifo.v | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/rtl/wb2axip/axivfifo.v b/rtl/wb2axip/axivfifo.v index 2dc5369..a247ecf 100644 --- a/rtl/wb2axip/axivfifo.v +++ b/rtl/wb2axip/axivfifo.v @@ -46,7 +46,7 @@ // //////////////////////////////////////////////////////////////////////////////// // -`default_nettype none +//`default_nettype none // // `define AXI3 // }}} @@ -60,7 +60,7 @@ module axivfifo #( // to the bus data width. Use an upstream core if you need to // pack a smaller width into your bus's width, or a downstream // core if you need to unpack it. - localparam C_AXIS_DATA_WIDTH = C_AXI_DATA_WIDTH, + /*local*/parameter C_AXIS_DATA_WIDTH = C_AXI_DATA_WIDTH, // // LGMAXBURST determines the size of the maximum AXI burst. // In AXI4, the maximum burst size is 256 beats the log_2() @@ -100,7 +100,7 @@ module axivfifo #( parameter [C_AXI_ID_WIDTH-1:0] AXI_READ_ID = 0, parameter [C_AXI_ID_WIDTH-1:0] AXI_WRITE_ID = 0, // - localparam ADDRLSB= $clog2(C_AXI_DATA_WIDTH)-3 + /*local*/parameter ADDRLSB= $clog2(C_AXI_DATA_WIDTH)-3 // }}} ) ( // {{{ |
