diff options
| author | Alejandro Soto <alejandro@34project.org> | 2023-10-26 01:33:00 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-10-26 01:33:00 -0600 |
| commit | 986863efed48dfba23907400beb7e5f025b75b50 (patch) | |
| tree | e0ff07cc351943639af64b4b6109e6e2c027f9e7 /rtl/gfx | |
| parent | d6c2fd1dcee4c4e413faebca2bd2cd2513132f7d (diff) | |
rtl/gfx: synchronize clock with SDRAM
Diffstat (limited to 'rtl/gfx')
| -rw-r--r-- | rtl/gfx/gfx_defs.sv | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/rtl/gfx/gfx_defs.sv b/rtl/gfx/gfx_defs.sv index 648f9e6..b1f8bb8 100644 --- a/rtl/gfx/gfx_defs.sv +++ b/rtl/gfx/gfx_defs.sv @@ -6,9 +6,9 @@ `define FLOATS_PER_VEC 4 `define VECS_PER_MAT 4 -// Target de 100MHz con float16, rounding aproximado -`define FP_ADD_STAGES 4 // ~325 LUTs -`define FP_MUL_STAGES 3 // ~119 LUTs ~1 bloque DSP +// Target de 200MHz (reloj es 143MHz) con float16, rounding aproximado +`define FP_ADD_STAGES 10 // ~401 LUTs +`define FP_MUL_STAGES 5 // ~144 LUTs ~1 bloque DSP typedef logic[`FLOAT_BITS - 1:0] fp; typedef fp vec2[2]; |