rtl/gfx: add command registers for dual fb addresses

7 files changed, 70 insertions, 33 deletions

diff --git a/rtl/gfx/gfx.sv b/rtl/gfx/gfx.sv
index 10f4473..73e5dbf 100644
--- a/rtl/gfx/gfx.sv
+++ b/rtl/gfx/gfx.sv
@@ -36,7 +36,7 @@ module gfx
 
 	logic enable_clear, program_start, start_clear, swap_buffers;
 	rgb24 clear_color;
-	cmd_word program_header_base, program_header_size;
+	cmd_word fb_base_a, fb_base_b, program_header_base, program_header_size;
 
 	gfx_cmd cmd
 	(
@@ -124,6 +124,7 @@ module gfx
 	);
 
 	logic frag_mask, scan_mask;
+	vram_addr frag_base, scan_base;
 
 	gfx_masks masks
 	(
@@ -169,8 +170,8 @@ module gfx
 	);
 
 	logic rop_mask_assert, rop_ready, rop_write;
+	vram_addr rop_address;
 	vram_word rop_writedata;
-	half_coord rop_address;
 	linear_coord rop_mask_addr;
 
 	gfx_rop rop
@@ -194,7 +195,7 @@ module gfx
 	);
 
 	logic fb_read, vsync;
-	half_coord fb_address;
+	vram_addr fb_address;
 	linear_coord scan_mask_addr;
 
 	gfx_scanout scanout
diff --git a/rtl/gfx/gfx_cmd.sv b/rtl/gfx/gfx_cmd.sv
index 40e2ccb..85e99a2 100644
--- a/rtl/gfx/gfx_cmd.sv
+++ b/rtl/gfx/gfx_cmd.sv
@@ -2,25 +2,28 @@
 
 module gfx_cmd
 (
-	input  logic       clk,
-	                   rst_n,
+	input  logic    clk,
+	                rst_n,
 
-	input  cmd_addr    cmd_address,
-	input  logic       cmd_read,
-	                   cmd_write,
-	input  cmd_word    cmd_writedata,
-	output cmd_word    cmd_readdata,
+	input  cmd_addr cmd_address,
+	input  logic    cmd_read,
+	                cmd_write,
+	input  cmd_word cmd_writedata,
+	output cmd_word cmd_readdata,
 
-	input  logic       vsync,
+	input  logic    vsync,
 
-	output logic       swap_buffers,
-	                   enable_clear,
-	                   start_clear,
-	output rgb24       clear_color,
+	output logic    swap_buffers,
+	                enable_clear,
+	                start_clear,
+	output rgb24    clear_color,
 
-	output logic       program_start,
-	output cmd_word    program_header_base,
-	                   program_header_size
+	output logic    program_start,
+	output cmd_word program_header_base,
+	                program_header_size,
+
+	output cmd_word fb_base_a,
+	                fb_base_b
 );
 
 	rgb24 next_clear_color;
@@ -56,6 +59,9 @@ module gfx_cmd
 			next_swap_buffers <= 0;
 
 			program_start <= 0;
+
+			fb_base_a <= 0;
+			fb_base_b <= 0;
 		end else begin
 			start_clear <= 0;
 			program_start <= 0;
@@ -67,7 +73,7 @@ module gfx_cmd
 			end
 
 			if (cmd_write)
-				unique case (cmd_address[1:0])
+				unique case (cmd_address[2:0])
 					`GFX_CMD_REG_ID: ;
 
 					`GFX_CMD_REG_SCAN: begin
@@ -82,6 +88,14 @@ module gfx_cmd
 
 					`GFX_CMD_REG_HEADER_SIZE:
 						program_start <= 1;
+
+					`GFX_CMD_REG_FB_BASE_A:
+						fb_base_a <= cmd_writedata;
+	
+					`GFX_CMD_REG_FB_BASE_B:
+						fb_base_b <= cmd_writedata;
+
+					default: ;
 				endcase
 		end
 
@@ -90,7 +104,7 @@ module gfx_cmd
 			clear_color <= next_clear_color;
 
 		if (cmd_write)
-			unique case (cmd_address[1:0])
+			unique case (cmd_address[2:0])
 				`GFX_CMD_REG_ID: ;
 
 				`GFX_CMD_REG_SCAN:
@@ -101,6 +115,8 @@ module gfx_cmd
 
 				`GFX_CMD_REG_HEADER_SIZE:
 					program_header_size <= cmd_writedata;
+
+				default: ;
 			endcase
 	end
 
diff --git a/rtl/gfx/gfx_defs.sv b/rtl/gfx/gfx_defs.sv
index b801338..1e7a335 100644
--- a/rtl/gfx/gfx_defs.sv
+++ b/rtl/gfx/gfx_defs.sv
@@ -189,10 +189,12 @@ typedef logic[`GFX_LANE_ADDR_BITS - 1:0] vram_lane_addr;
 typedef logic[5:0]  cmd_addr;
 typedef logic[31:0] cmd_word;
 
-`define GFX_CMD_REG_ID          2'b00
-`define GFX_CMD_REG_SCAN        2'b01
-`define GFX_CMD_REG_HEADER_BASE 2'b10
-`define GFX_CMD_REG_HEADER_SIZE 2'b11
+`define GFX_CMD_REG_ID          3'b000
+`define GFX_CMD_REG_SCAN        3'b001
+`define GFX_CMD_REG_HEADER_BASE 3'b010
+`define GFX_CMD_REG_HEADER_SIZE 3'b011
+`define GFX_CMD_REG_FB_BASE_A   3'b100
+`define GFX_CMD_REG_FB_BASE_B   3'b101
 
 typedef struct packed
 {
diff --git a/rtl/gfx/gfx_masks.sv b/rtl/gfx/gfx_masks.sv
index 86d1b78..5182bd4 100644
--- a/rtl/gfx/gfx_masks.sv
+++ b/rtl/gfx/gfx_masks.sv
@@ -3,8 +3,11 @@
 module gfx_masks
 (
 	input  logic        clk,
+	                    rst_n,
 
 	input  logic        swap_buffers,
+	input  cmd_word     fb_base_a,
+	                    fb_base_b,
 
 	input  linear_coord scan_mask_addr,
 	output logic        scan_mask,
@@ -13,7 +16,10 @@ module gfx_masks
 	                    frag_mask_set,
 	input  linear_coord frag_mask_read_addr,
 	                    frag_mask_write_addr,
-	output logic        frag_mask
+	output logic        frag_mask,
+
+	output vram_addr    frag_base,
+	                    scan_base
 );
 
 	logic mask_a, mask_b, frag_write_hold, frag_set_hold;
@@ -39,6 +45,15 @@ module gfx_masks
 		.*
 	);
 
+	always_ff @(posedge clk or negedge rst_n)
+		if (!rst_n) begin
+			frag_base <= 0;
+			scan_base <= 0;
+		end else begin
+			frag_base <= swap_buffers ? fb_base_a[$bits(vram_addr):1] : fb_base_b[$bits(vram_addr):1];
+			scan_base <= swap_buffers ? fb_base_b[$bits(vram_addr):1] : fb_base_a[$bits(vram_addr):1];
+		end
+
 	always_ff @(posedge clk) begin
 		scan_mask <= swap_buffers ? mask_b : mask_a;
 		scan_addr_hold <= scan_mask_addr;
diff --git a/rtl/gfx/gfx_mem.sv b/rtl/gfx/gfx_mem.sv
index 0176858..fbca2fa 100644
--- a/rtl/gfx/gfx_mem.sv
+++ b/rtl/gfx/gfx_mem.sv
@@ -23,11 +23,11 @@ module gfx_mem
 
 	input  logic          rop_write,
 	input  vram_word      rop_writedata,
-	input  half_coord     rop_address,
+	input  vram_addr      rop_address,
 	output logic          rop_waitrequest,
 
 	input  logic          fb_read,
-	input  half_coord     fb_address,
+	input  vram_addr      fb_address,
 	output logic          fb_waitrequest,
 	                      fb_readdatavalid,
 	output vram_word      fb_readdata,
@@ -175,7 +175,7 @@ module gfx_mem
 
 		if (fb_read) begin
 			fb_waitrequest = !in_ready;
-			trans_in.address = {5'd0, fb_address};
+			trans_in.address = fb_address;
 		end else if (batch_read) begin
 			batch_waitrequest = !in_ready;
 			trans_in.address = batch_address;
@@ -183,7 +183,7 @@ module gfx_mem
 			rop_waitrequest = !in_ready;
 
 			trans_in.write = 1;
-			trans_in.address = {5'd0, rop_address};
+			trans_in.address = rop_address;
 			trans_in.writedata = rop_writedata;
 		end else if (fetch_read) begin
 			fetch_waitrequest = !in_ready;
diff --git a/rtl/gfx/gfx_rop.sv b/rtl/gfx/gfx_rop.sv
index dcdafe0..3e6ef35 100644
--- a/rtl/gfx/gfx_rop.sv
+++ b/rtl/gfx/gfx_rop.sv
@@ -5,6 +5,8 @@ module gfx_rop
 	input  logic        clk,
 	                    rst_n,
 
+	input  vram_addr    frag_base,
+
 	input  frag_paint   in,
 	input  logic        in_valid,
 	output logic        in_ready,
@@ -12,7 +14,7 @@ module gfx_rop
 	input  logic        rop_waitrequest,
 	output logic        rop_write,
 	output vram_word    rop_writedata,
-	output half_coord   rop_address,
+	output vram_addr    rop_address,
 
 	output linear_coord mask_addr,
 	output logic        mask_assert
@@ -32,7 +34,7 @@ module gfx_rop
 	assign {color_hi, color_lo} = hold.color;
 
 	assign mask_addr = hold.addr;
-	assign rop_address = {hold.addr, hi};
+	assign rop_address = frag_base + {5'd0, hold.addr, hi};
 	assign rop_writedata = hi ? color_hi : color_lo;
 
 	always_comb begin
diff --git a/rtl/gfx/gfx_scanout.sv b/rtl/gfx/gfx_scanout.sv
index 1d738c4..a43d14c 100644
--- a/rtl/gfx/gfx_scanout.sv
+++ b/rtl/gfx/gfx_scanout.sv
@@ -7,6 +7,7 @@ module gfx_scanout
 
 	input  logic        enable_clear,
 	input  rgb24        clear_color,
+	input  vram_addr    scan_base,
 
 	input  logic        mask,
 	output linear_coord mask_addr,
@@ -15,7 +16,7 @@ module gfx_scanout
 	                    fb_readdatavalid,
 	input  vram_word    fb_readdata,
 	output logic        fb_read,
-	output half_coord   fb_address,
+	output vram_addr    fb_address,
 
 	input  logic        scan_ready,
 	output logic        scan_valid,
@@ -128,7 +129,7 @@ module gfx_scanout
 		mask_hold_addr <= mask_out_addr;
 
 		if (fb_ready)
-			fb_address <= mask_out_addr;
+			fb_address <= scan_base + {5'd0, mask_out_addr};
 
 		if (mask_fifo_ready)
 			put_mask <= effective_mask;