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| author | Alejandro Soto <alejandro@34project.org> | 2024-04-27 11:45:23 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2024-04-27 11:45:23 -0600 |
| commit | 45b5eabe868ac2f8a755379bde07c102caf74afb (patch) | |
| tree | 7b740cbc6b19b46d731e29ee145c2a8ad744e847 /rtl/fpu/lzc | |
| parent | a61ee4b16157f3c6501d958b8dcde7f57f41110d (diff) | |
rtl/fpu: initial commit
Imported from https://github.com/taneroksuz/fpu-sp
Diffstat (limited to 'rtl/fpu/lzc')
| -rw-r--r-- | rtl/fpu/lzc/lzc_128.sv | 64 | ||||
| -rw-r--r-- | rtl/fpu/lzc/lzc_16.sv | 49 | ||||
| -rw-r--r-- | rtl/fpu/lzc/lzc_256.sv | 69 | ||||
| -rw-r--r-- | rtl/fpu/lzc/lzc_32.sv | 54 | ||||
| -rw-r--r-- | rtl/fpu/lzc/lzc_4.sv | 33 | ||||
| -rw-r--r-- | rtl/fpu/lzc/lzc_64.sv | 59 | ||||
| -rw-r--r-- | rtl/fpu/lzc/lzc_8.sv | 44 | ||||
| -rw-r--r-- | rtl/fpu/lzc/lzc_wire.sv | 17 |
8 files changed, 389 insertions, 0 deletions
diff --git a/rtl/fpu/lzc/lzc_128.sv b/rtl/fpu/lzc/lzc_128.sv new file mode 100644 index 0000000..4ac6464 --- /dev/null +++ b/rtl/fpu/lzc/lzc_128.sv @@ -0,0 +1,64 @@ +module lzc_128 ( + input [127:0] a, + output [6:0] c, + output v +); + + logic [5:0] z0; + logic [5:0] z1; + + logic v0; + logic v1; + + logic s0; + logic s1; + logic s2; + logic s3; + logic s4; + logic s5; + logic s6; + logic s7; + logic s8; + logic s9; + logic s10; + logic s11; + logic s12; + logic s13; + logic s14; + + lzc_64 lzc_64_comp_0 ( + .a(a[63:0]), + .c(z0), + .v(v0) + ); + + lzc_64 lzc_64_comp_1 ( + .a(a[127:64]), + .c(z1), + .v(v1) + ); + + assign s0 = v1 | v0; + assign s1 = (~v1) & z0[0]; + assign s2 = z1[0] | s1; + assign s3 = (~v1) & z0[1]; + assign s4 = z1[1] | s3; + assign s5 = (~v1) & z0[2]; + assign s6 = z1[2] | s5; + assign s7 = (~v1) & z0[3]; + assign s8 = z1[3] | s7; + assign s9 = (~v1) & z0[4]; + assign s10 = z1[4] | s9; + assign s11 = (~v1) & z0[5]; + assign s12 = z1[5] | s11; + + assign v = s0; + assign c[0] = s2; + assign c[1] = s4; + assign c[2] = s6; + assign c[3] = s8; + assign c[4] = s10; + assign c[5] = s12; + assign c[6] = v1; + +endmodule diff --git a/rtl/fpu/lzc/lzc_16.sv b/rtl/fpu/lzc/lzc_16.sv new file mode 100644 index 0000000..9992878 --- /dev/null +++ b/rtl/fpu/lzc/lzc_16.sv @@ -0,0 +1,49 @@ +module lzc_16 ( + input [15:0] a, + output [3:0] c, + output v +); + + logic [2:0] z0; + logic [2:0] z1; + + logic v0; + logic v1; + + logic s0; + logic s1; + logic s2; + logic s3; + logic s4; + logic s5; + logic s6; + logic s7; + logic s8; + + lzc_8 lzc_8_comp_0 ( + .a(a[7:0]), + .c(z0), + .v(v0) + ); + + lzc_8 lzc_8_comp_1 ( + .a(a[15:8]), + .c(z1), + .v(v1) + ); + + assign s0 = v1 | v0; + assign s1 = (~v1) & z0[0]; + assign s2 = z1[0] | s1; + assign s3 = (~v1) & z0[1]; + assign s4 = z1[1] | s3; + assign s5 = (~v1) & z0[2]; + assign s6 = z1[2] | s5; + + assign v = s0; + assign c[0] = s2; + assign c[1] = s4; + assign c[2] = s6; + assign c[3] = v1; + +endmodule diff --git a/rtl/fpu/lzc/lzc_256.sv b/rtl/fpu/lzc/lzc_256.sv new file mode 100644 index 0000000..cb4ded6 --- /dev/null +++ b/rtl/fpu/lzc/lzc_256.sv @@ -0,0 +1,69 @@ +module lzc_256 ( + input [255:0] a, + output [7:0] c, + output v +); + + logic [6:0] z0; + logic [6:0] z1; + + logic v0; + logic v1; + + logic s0; + logic s1; + logic s2; + logic s3; + logic s4; + logic s5; + logic s6; + logic s7; + logic s8; + logic s9; + logic s10; + logic s11; + logic s12; + logic s13; + logic s14; + logic s15; + logic s16; + + lzc_128 lzc_128_comp_0 ( + .a(a[127:0]), + .c(z0), + .v(v0) + ); + + lzc_128 lzc_128_comp_1 ( + .a(a[255:128]), + .c(z1), + .v(v1) + ); + + assign s0 = v1 | v0; + assign s1 = (~v1) & z0[0]; + assign s2 = z1[0] | s1; + assign s3 = (~v1) & z0[1]; + assign s4 = z1[1] | s3; + assign s5 = (~v1) & z0[2]; + assign s6 = z1[2] | s5; + assign s7 = (~v1) & z0[3]; + assign s8 = z1[3] | s7; + assign s9 = (~v1) & z0[4]; + assign s10 = z1[4] | s9; + assign s11 = (~v1) & z0[5]; + assign s12 = z1[5] | s11; + assign s13 = (~v1) & z0[6]; + assign s14 = z1[6] | s13; + + assign v = s0; + assign c[0] = s2; + assign c[1] = s4; + assign c[2] = s6; + assign c[3] = s8; + assign c[4] = s10; + assign c[5] = s12; + assign c[6] = s14; + assign c[7] = v1; + +endmodule diff --git a/rtl/fpu/lzc/lzc_32.sv b/rtl/fpu/lzc/lzc_32.sv new file mode 100644 index 0000000..5ce1fa9 --- /dev/null +++ b/rtl/fpu/lzc/lzc_32.sv @@ -0,0 +1,54 @@ +module lzc_32 ( + input [31:0] a, + output [4:0] c, + output v +); + + logic [3:0] z0; + logic [3:0] z1; + + logic v0; + logic v1; + + logic s0; + logic s1; + logic s2; + logic s3; + logic s4; + logic s5; + logic s6; + logic s7; + logic s8; + logic s9; + logic s10; + + lzc_16 lzc_16_comp_0 ( + .a(a[15:0]), + .c(z0), + .v(v0) + ); + + lzc_16 lzc_16_comp_1 ( + .a(a[31:16]), + .c(z1), + .v(v1) + ); + + assign s0 = v1 | v0; + assign s1 = (~v1) & z0[0]; + assign s2 = z1[0] | s1; + assign s3 = (~v1) & z0[1]; + assign s4 = z1[1] | s3; + assign s5 = (~v1) & z0[2]; + assign s6 = z1[2] | s5; + assign s7 = (~v1) & z0[3]; + assign s8 = z1[3] | s7; + + assign v = s0; + assign c[0] = s2; + assign c[1] = s4; + assign c[2] = s6; + assign c[3] = s8; + assign c[4] = v1; + +endmodule diff --git a/rtl/fpu/lzc/lzc_4.sv b/rtl/fpu/lzc/lzc_4.sv new file mode 100644 index 0000000..0d5182c --- /dev/null +++ b/rtl/fpu/lzc/lzc_4.sv @@ -0,0 +1,33 @@ +module lzc_4 ( + input [3:0] a, + output [1:0] c, + output v +); + + logic a0; + logic a1; + logic a2; + logic a3; + + logic s0; + logic s1; + logic s2; + logic s3; + logic s4; + + assign a0 = a[0]; + assign a1 = a[1]; + assign a2 = a[2]; + assign a3 = a[3]; + + assign s0 = a3 | a2; + assign s1 = a1 | a0; + assign s2 = s1 | s0; + assign s3 = (~s0) & a1; + assign s4 = a3 | s3; + + assign v = s2; + assign c[0] = s4; + assign c[1] = s0; + +endmodule diff --git a/rtl/fpu/lzc/lzc_64.sv b/rtl/fpu/lzc/lzc_64.sv new file mode 100644 index 0000000..b235add --- /dev/null +++ b/rtl/fpu/lzc/lzc_64.sv @@ -0,0 +1,59 @@ +module lzc_64 ( + input [63:0] a, + output [5:0] c, + output v +); + + logic [4:0] z0; + logic [4:0] z1; + + logic v0; + logic v1; + + logic s0; + logic s1; + logic s2; + logic s3; + logic s4; + logic s5; + logic s6; + logic s7; + logic s8; + logic s9; + logic s10; + logic s11; + logic s12; + + lzc_32 lzc_32_comp_0 ( + .a(a[31:0]), + .c(z0), + .v(v0) + ); + + lzc_32 lzc_32_comp_1 ( + .a(a[63:32]), + .c(z1), + .v(v1) + ); + + assign s0 = v1 | v0; + assign s1 = (~v1) & z0[0]; + assign s2 = z1[0] | s1; + assign s3 = (~v1) & z0[1]; + assign s4 = z1[1] | s3; + assign s5 = (~v1) & z0[2]; + assign s6 = z1[2] | s5; + assign s7 = (~v1) & z0[3]; + assign s8 = z1[3] | s7; + assign s9 = (~v1) & z0[4]; + assign s10 = z1[4] | s9; + + assign v = s0; + assign c[0] = s2; + assign c[1] = s4; + assign c[2] = s6; + assign c[3] = s8; + assign c[4] = s10; + assign c[5] = v1; + +endmodule diff --git a/rtl/fpu/lzc/lzc_8.sv b/rtl/fpu/lzc/lzc_8.sv new file mode 100644 index 0000000..562b79f --- /dev/null +++ b/rtl/fpu/lzc/lzc_8.sv @@ -0,0 +1,44 @@ +module lzc_8 ( + input [7:0] a, + output [2:0] c, + output v +); + + logic [1:0] z0; + logic [1:0] z1; + + logic v0; + logic v1; + + logic s0; + logic s1; + logic s2; + logic s3; + logic s4; + logic s5; + logic s6; + + lzc_4 lzc_4_comp_0 ( + .a(a[3:0]), + .c(z0), + .v(v0) + ); + + lzc_4 lzc_4_comp_1 ( + .a(a[7:4]), + .c(z1), + .v(v1) + ); + + assign s0 = v1 | v0; + assign s1 = (~v1) & z0[0]; + assign s2 = z1[0] | s1; + assign s3 = (~v1) & z0[1]; + assign s4 = z1[1] | s3; + + assign v = s0; + assign c[0] = s2; + assign c[1] = s4; + assign c[2] = v1; + +endmodule diff --git a/rtl/fpu/lzc/lzc_wire.sv b/rtl/fpu/lzc/lzc_wire.sv new file mode 100644 index 0000000..6277bfe --- /dev/null +++ b/rtl/fpu/lzc/lzc_wire.sv @@ -0,0 +1,17 @@ +package lzc_wire; + + typedef struct packed {logic [63:0] a;} lzc_64_in_type; + + typedef struct packed { + logic [5:0] c; + logic v; + } lzc_64_out_type; + + typedef struct packed {logic [255:0] a;} lzc_256_in_type; + + typedef struct packed { + logic [7:0] c; + logic v; + } lzc_256_out_type; + +endpackage |
