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| author | Alejandro Soto <alejandro@34project.org> | 2024-02-28 16:44:15 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2024-03-03 20:42:36 -0600 |
| commit | cce507d21c86f20a83eec1b09fe3231399ffb10c (patch) | |
| tree | cef497f3eb1767aeb9d8817adbbed467eac3b72d /rtl/dma_axi32/prgen_stall.v | |
| parent | 872349eb3a3a508abee028e75da546692eb8e0e7 (diff) | |
rtl/dma_axi32: fix verilator warnings
Diffstat (limited to 'rtl/dma_axi32/prgen_stall.v')
| -rw-r--r-- | rtl/dma_axi32/prgen_stall.v | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/rtl/dma_axi32/prgen_stall.v b/rtl/dma_axi32/prgen_stall.v index eb39668..2954753 100644 --- a/rtl/dma_axi32/prgen_stall.v +++ b/rtl/dma_axi32/prgen_stall.v @@ -1,3 +1,5 @@ +// verilator lint_off WIDTHEXPAND +// verilator lint_off WIDTHTRUNC /////////////////////////////////////////////////////////////////////
//// ////
//// Author: Eyal Hochberg ////
@@ -55,11 +57,11 @@ module prgen_stall(clk,reset,din,stall,dout); always @(posedge clk or posedge reset) if (reset) - count <= #1 {DEPTH{1'b0}}; + count <= {DEPTH{1'b0}}; else if (pend & (~stall)) - count <= #1 count - 1'b1; + count <= count - 1'b1; else if (din & stall) - count <= #1 count + 1'b1; + count <= count + 1'b1; assign pend = (|count); assign dout = (din | pend) & (~stall); @@ -77,3 +79,5 @@ endmodule +// verilator lint_on WIDTHEXPAND +// verilator lint_on WIDTHTRUNC |
