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authorAlejandro Soto <alejandro@34project.org>2022-12-16 22:20:01 -0600
committerAlejandro Soto <alejandro@34project.org>2022-12-16 22:20:26 -0600
commit9ebb4b712e1d6c97a999652d0b9105847eabd134 (patch)
tree0526b6d473ccb1652033613477ad1e8cae034c24 /rtl/core/mmu
parent17366ce06afe0a611ba25a47523c81b01c64961c (diff)
Implement mode privilege checks in MMU
Diffstat (limited to 'rtl/core/mmu')
-rw-r--r--rtl/core/mmu/mmu.sv3
-rw-r--r--rtl/core/mmu/pagewalk.sv4
2 files changed, 4 insertions, 3 deletions
diff --git a/rtl/core/mmu/mmu.sv b/rtl/core/mmu/mmu.sv
index d22f1cd..f8e808b 100644
--- a/rtl/core/mmu/mmu.sv
+++ b/rtl/core/mmu/mmu.sv
@@ -6,7 +6,8 @@ module core_mmu
input logic clk,
rst_n,
- input logic mmu_enable /*verilator public*/,
+ input logic privileged,
+ mmu_enable /*verilator public*/,
input mmu_base mmu_ttbr /*verilator public*/,
input word mmu_dac,
diff --git a/rtl/core/mmu/pagewalk.sv b/rtl/core/mmu/pagewalk.sv
index ce25b19..eb36580 100644
--- a/rtl/core/mmu/pagewalk.sv
+++ b/rtl/core/mmu/pagewalk.sv
@@ -6,7 +6,8 @@ module core_mmu_pagewalk
input logic clk,
rst_n,
- input logic mmu_enable,
+ input logic privileged,
+ mmu_enable,
input mmu_base mmu_ttbr,
input word mmu_dac,
@@ -56,7 +57,6 @@ module core_mmu_pagewalk
.write(hold_write),
.fault(access_fault),
.domain(entry_domain),
- .privileged(1), //TODO
.fault_type(access_fault_type),
.*
);