diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-11-10 18:00:43 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-11-10 18:00:43 -0600 |
| commit | 028ab74e28a08982d0ef5fea9cdf0225c7daeac3 (patch) | |
| tree | 8658fe516c51234797796f56da1ae6682b3107fc /rtl/core/mmu/mmu.sv | |
| parent | ba5557c0b9096716bf6b1e3d102979ebec82b51a (diff) | |
Fix fetch discard glitches on flush
Diffstat (limited to 'rtl/core/mmu/mmu.sv')
| -rw-r--r-- | rtl/core/mmu/mmu.sv | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/rtl/core/mmu/mmu.sv b/rtl/core/mmu/mmu.sv index cfb223f..51d7f32 100644 --- a/rtl/core/mmu/mmu.sv +++ b/rtl/core/mmu/mmu.sv @@ -28,9 +28,9 @@ module core_mmu DATA } master, next_master; - logic active, hold_start, hold_write, hold_issue, hold_free, transition; ptr hold_addr; word hold_data_wr; + logic active, hold_start, hold_write, hold_issue, hold_free, transition; //TODO assign insn_data_rd = bus_data_rd; |