diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-12-06 15:27:42 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-12-06 15:27:42 -0600 |
| commit | b1761b8eac5777c09723bbc8cd31cc05d8ec35ae (patch) | |
| tree | a7a50591a1b5f9d7e26a7f6797a97d9ac213879a /rtl/core/decode | |
| parent | 064b72ae4eb22336438288a9664a37c0dd07f4bc (diff) | |
Implement breakpoints
Diffstat (limited to 'rtl/core/decode')
| -rw-r--r-- | rtl/core/decode/decode.sv | 5 | ||||
| -rw-r--r-- | rtl/core/decode/isa.sv | 4 | ||||
| -rw-r--r-- | rtl/core/decode/mux.sv | 11 |
3 files changed, 18 insertions, 2 deletions
diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv index f16db9a..6534897 100644 --- a/rtl/core/decode/decode.sv +++ b/rtl/core/decode/decode.sv @@ -29,6 +29,7 @@ module core_decode assign dec_ctrl.mul = mul; assign dec_ctrl.psr = psr; assign dec_ctrl.ldst = ldst; + assign dec_ctrl.bkpt = bkpt; assign dec_ctrl.branch = branch; assign dec_ctrl.coproc = coproc; assign dec_ctrl.execute = execute; @@ -44,8 +45,8 @@ module core_decode assign dec_psr.restore_spsr = restore_spsr; logic execute, undefined, conditional, writeback, update_flags, - restore_spsr, branch, ldst, mul, psr, coproc, psr_saved, - psr_write, psr_wr_flags, psr_wr_control; + restore_spsr, branch, ldst, mul, psr, coproc, bkpt, + psr_saved, psr_write, psr_wr_flags, psr_wr_control; core_decode_mux mux ( diff --git a/rtl/core/decode/isa.sv b/rtl/core/decode/isa.sv index 7c27f49..4c9f316 100644 --- a/rtl/core/decode/isa.sv +++ b/rtl/core/decode/isa.sv @@ -209,4 +209,8 @@ `define FIELD_SWI_IMM [23:0] +// GDB swbreak (a magic 'und') + +`define INSN_GDB_SWBREAK 28'h7ffdefe + `endif diff --git a/rtl/core/decode/mux.sv b/rtl/core/decode/mux.sv index 3f613a4..f05b711 100644 --- a/rtl/core/decode/mux.sv +++ b/rtl/core/decode/mux.sv @@ -57,6 +57,7 @@ module core_decode_mux mul, psr, coproc, + bkpt, psr_saved, psr_write, psr_wr_flags, @@ -71,6 +72,7 @@ module core_decode_mux always_comb begin mul = 0; ldst = 0; + bkpt = 0; branch = 0; coproc = 0; execute = 1; @@ -230,6 +232,14 @@ module core_decode_mux writeback = 1; end +`ifdef VERILATOR + // No es parte de ARM del todo, es un hack para soportar gdb + `INSN_GDB_SWBREAK: begin + bkpt = 1; + dec_data.uses_rn = 0; + end +`endif + default: undefined = 1; endcase @@ -252,6 +262,7 @@ module core_decode_mux mul = 1'bx; psr = 1'bx; + bkpt = 1'bx; ldst = 1'bx; branch = 1'bx; coproc = 1'bx; |
