Implement data aborts

2 files changed, 9 insertions, 1 deletions

diff --git a/rtl/core/cp15/cp15.sv b/rtl/core/cp15/cp15.sv
index 8ddc474..bf84292 100644
--- a/rtl/core/cp15/cp15.sv
+++ b/rtl/core/cp15/cp15.sv
@@ -10,6 +10,9 @@ module core_cp15
 	input  coproc_decode dec,
 	input  word          write,
 
+	input  logic         fault_register,
+	input  ptr           fault_addr,
+
 	output word          read,
 	output logic         high_vectors,
 	                     mmu_enable,
@@ -61,7 +64,7 @@ module core_cp15
 		.*
 	);
 
-	core_cp15_far fsr
+	core_cp15_fsr fsr
 	(
 		.read(read_fsr),
 		.transfer(transfer && crn == `CP15_CRN_FSR),
diff --git a/rtl/core/cp15/far.sv b/rtl/core/cp15/far.sv
index b90dc0f..3d86151 100644
--- a/rtl/core/cp15/far.sv
+++ b/rtl/core/cp15/far.sv
@@ -11,6 +11,9 @@ module core_cp15_far
 	input  cp_opcode op2,
 	input  word      write,
 
+	input  logic     fault_register,
+	input  ptr       fault_addr,
+
 	output word      read
 );
 
@@ -21,6 +24,8 @@ module core_cp15_far
 	always @(posedge clk or negedge rst_n)
 		if(!rst_n)
 			far <= 0;
+		else if(fault_register)
+			far <= {fault_addr, 2'b00};
 		else if(transfer && !load)
 			far <= write;