summaryrefslogtreecommitdiff
path: root/rtl/core/cp15
diff options
context:
space:
mode:
authorAlejandro Soto <alejandro@34project.org>2022-12-12 11:47:02 -0600
committerAlejandro Soto <alejandro@34project.org>2022-12-16 16:29:10 -0600
commitc67d424c6d130f810c251576fd55389d1385edb5 (patch)
treeb274f3f80d0d06457696a53b35bb98bbfe572035 /rtl/core/cp15
parent79e05aa7f0ccce6eb26248ddef3e928727857a9c (diff)
Show main cp15 registers in register dumps
Diffstat (limited to 'rtl/core/cp15')
-rw-r--r--rtl/core/cp15/cp15.sv2
-rw-r--r--rtl/core/cp15/far.sv2
-rw-r--r--rtl/core/cp15/fsr.sv2
-rw-r--r--rtl/core/cp15/syscfg.sv2
-rw-r--r--rtl/core/cp15/ttbr.sv2
5 files changed, 5 insertions, 5 deletions
diff --git a/rtl/core/cp15/cp15.sv b/rtl/core/cp15/cp15.sv
index f0391e8..0659cad 100644
--- a/rtl/core/cp15/cp15.sv
+++ b/rtl/core/cp15/cp15.sv
@@ -61,7 +61,7 @@ module core_cp15
.*
);
- core_cp15_far far
+ core_cp15_far far_
(
.read(read_far),
.transfer(transfer && crn == `CP15_CRN_FAR),
diff --git a/rtl/core/cp15/far.sv b/rtl/core/cp15/far.sv
index 9e1d95c..36e76db 100644
--- a/rtl/core/cp15/far.sv
+++ b/rtl/core/cp15/far.sv
@@ -13,7 +13,7 @@ module core_cp15_far
input logic fault_register,
input ptr fault_addr,
- output word read
+ output word read /*verilator public*/
);
word far;
diff --git a/rtl/core/cp15/fsr.sv b/rtl/core/cp15/fsr.sv
index c42d16a..81b4992 100644
--- a/rtl/core/cp15/fsr.sv
+++ b/rtl/core/cp15/fsr.sv
@@ -16,7 +16,7 @@ module core_cp15_fsr
input mmu_fault_type fault_type,
input mmu_domain fault_domain,
- output word read
+ output word read /*verilator public*/
);
logic fsr_page;
diff --git a/rtl/core/cp15/syscfg.sv b/rtl/core/cp15/syscfg.sv
index d75f7ac..f7fc1a5 100644
--- a/rtl/core/cp15/syscfg.sv
+++ b/rtl/core/cp15/syscfg.sv
@@ -11,7 +11,7 @@ module core_cp15_syscfg
input cp_opcode op2,
input word write,
- output word read,
+ output word read /*verilator public*/,
output logic high_vectors,
mmu_enable
);
diff --git a/rtl/core/cp15/ttbr.sv b/rtl/core/cp15/ttbr.sv
index 5162edb..b462955 100644
--- a/rtl/core/cp15/ttbr.sv
+++ b/rtl/core/cp15/ttbr.sv
@@ -11,7 +11,7 @@ module core_cp15_ttbr
transfer,
input word write,
- output word read,
+ output word read /*verilator public*/,
output mmu_base mmu_ttbr
);