diff options
| author | Alejandro Soto <alejandro@34project.org> | 2023-09-29 19:50:01 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-09-29 20:51:28 -0600 |
| commit | bc98bc905c2e796f0d587719196f7e4bf344510a (patch) | |
| tree | f5859d0b2f4fd5ab8c785a7cbaffa54dc81bc797 /rtl/core/cp15/cache.sv | |
| parent | f06c23ac1327850eeeb390e155bfc6330d302a77 (diff) | |
platform: add CPUs and caches to qsys
Diffstat (limited to 'rtl/core/cp15/cache.sv')
| -rw-r--r-- | rtl/core/cp15/cache.sv | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/rtl/core/cp15/cache.sv b/rtl/core/cp15/cache.sv deleted file mode 100644 index cb6d4ad..0000000 --- a/rtl/core/cp15/cache.sv +++ /dev/null @@ -1,15 +0,0 @@ -`include "core/uarch.sv" - -module core_cp15_cache -( - input logic clk, - rst_n, - - input logic load, - transfer, - input word write -); - - //TODO - -endmodule |