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authorAlejandro Soto <alejandro@34project.org>2022-11-08 13:00:40 -0600
committerAlejandro Soto <alejandro@34project.org>2022-11-08 13:29:23 -0600
commitf6929f9a4703e3eee9d7bd9752de055729cdd498 (patch)
tree770acb4f96fd16e0f12bec2c5ed5cfdfa5a4c315 /rtl/core/arm810.sv
parent89a8edd4bb96787c69118dd5f549345015b2d480 (diff)
Register decode output in a new porch stage
Diffstat (limited to 'rtl/core/arm810.sv')
-rw-r--r--rtl/core/arm810.sv27
1 files changed, 20 insertions, 7 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv
index 3f2a53c..07a397b 100644
--- a/rtl/core/arm810.sv
+++ b/rtl/core/arm810.sv
@@ -13,26 +13,39 @@ module arm810
output word bus_data_wr
);
- logic stall, prefetch_flush, insn_start;
- word insn;
ptr fetch_insn_pc, insn_addr;
+ word fetch_insn;
+ logic stall, flush, prefetch_flush, insn_start;
+
+ //TODO
+ assign prefetch_flush = 0;
core_fetch #(.PREFETCH_ORDER(2)) fetch
(
- .branch(explicit_branch || wr_pc),
- .flush(0), //TODO
.addr(insn_addr),
- .fetched(insn_ready),
- .fetch_data(insn_data_rd),
+ .insn(fetch_insn),
.fetch(insn_start),
+ .branch(explicit_branch || wr_pc),
+ .fetched(insn_ready),
.insn_pc(fetch_insn_pc),
+ .fetch_data(insn_data_rd),
.*
);
- insn_decode dec;
+ insn_decode fetch_dec;
core_decode decode
(
+ .dec(fetch_dec),
+ .insn(fetch_insn)
+ );
+
+ ptr insn_pc;
+ word insn;
+ insn_decode dec;
+
+ core_porch porch
+ (
.*
);