diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-09-26 09:26:35 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-09-26 09:26:35 -0600 |
| commit | af2f49f863deaeb6dc905bbb15701b50bc139873 (patch) | |
| tree | e86dfc675f18ce49b91f4034788d1aaea4cbf2d3 /rtl/core/arm810.sv | |
| parent | 14d06f0bc047ad79830890807bfe6195ba3de8ff (diff) | |
Implement ALU shifter
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/arm810.sv | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv index d9939fd..b344836 100644 --- a/rtl/core/arm810.sv +++ b/rtl/core/arm810.sv @@ -45,11 +45,13 @@ module arm810 .* ); - reg_num rd; + reg_num rd, ra, rb; logic explicit_branch, writeback, update_flags; ptr branch_target; psr_mode reg_mode; alu_control alu_ctrl; + word alu_base; + logic[7:0] alu_shift; core_cycles cycles ( @@ -70,8 +72,8 @@ module arm810 core_regs regs ( - .rd_r_a(0), //TODO - .rd_r_b(0), //TODO + .rd_r_a(ra), + .rd_r_b(rb), .rd_mode(reg_mode), .wr_mode(reg_mode), .wr_r(rd), @@ -87,7 +89,8 @@ module arm810 ( .ctrl(alu_ctrl), .a(rd_value_a), - .b(rd_value_b), + .base(alu_base), + .shift(alu_shift), .c_in(flags.c), .q(wr_value), .nzcv(alu_flags), |