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| author | JulianCamacho <jjulian.341@gmail.com> | 2023-10-04 18:19:34 -0600 |
|---|---|---|
| committer | JulianCamacho <jjulian.341@gmail.com> | 2023-10-04 18:19:34 -0600 |
| commit | 4448c8f77c87ad1ac34f42df2ef6ef91c36b54a6 (patch) | |
| tree | b1fef7773892cfe107c60cf393b42346abe1f185 /rtl/cache | |
| parent | cb1c2ce13066d7ef64d92699d005a67858ff06a8 (diff) | |
sram comment
Diffstat (limited to '')
| -rw-r--r-- | rtl/cache/sram.sv | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/rtl/cache/sram.sv b/rtl/cache/sram.sv index 74f9e65..bd9140d 100644 --- a/rtl/cache/sram.sv +++ b/rtl/cache/sram.sv @@ -21,6 +21,8 @@ module cache_sram // Existe un mito que habla de true dual-ports con byte-enables, dudo mucho que sea real: // https://www.intel.com/content/www/us/en/docs/programmable/683082/21-3/ram-with-byte-enable-signals.html + // Define la cantidad de lĂneas de cache + // $bits(addr_index) = 9 --> 1 << 9 = 512 localparam DEPTH = 1 << $bits(addr_index); line data_file[DEPTH] /*verilator public*/; |
