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| author | Alejandro Soto <alejandro@34project.org> | 2023-10-28 02:29:46 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-10-28 02:29:46 -0600 |
| commit | 98d493f9c80f356cdbc2669150d772e451c3b80e (patch) | |
| tree | 320f7c6b86ea5be5d07f848ec450663e9319de0b /rtl/cache/routing.sv | |
| parent | 7c5974f80f2b549a45721053037e877bc6bda438 (diff) | |
platform: implement support for disabling CPUs
Diffstat (limited to 'rtl/cache/routing.sv')
| -rw-r--r-- | rtl/cache/routing.sv | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/rtl/cache/routing.sv b/rtl/cache/routing.sv index 4119a7f..a0c4347 100644 --- a/rtl/cache/routing.sv +++ b/rtl/cache/routing.sv @@ -1,4 +1,5 @@ `include "cache/defs.sv" +`include "config.sv" module cache_routing ( @@ -63,7 +64,7 @@ module cache_routing * Entonces si los bits de IO son distintos de 0, se sabe que no es * una dirección cached */ - assign cached = io == `IO_CACHED; + assign cached = io == `IO_CACHED && `CONFIG_CACHE; // Se afirma si cache quiere hacer un read o write de memoria assign cache_mem = cache_mem_read || cache_mem_write; |