diff options
| author | Alejandro Soto <alejandro@34project.org> | 2023-10-05 16:26:26 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-10-05 17:16:55 -0600 |
| commit | d406720cecd7328f595255e65b6fd6b6814cefe4 (patch) | |
| tree | c085f1b4a2d30df0c08cd1efcbf3503ee40c5354 /rtl/cache/cache_control.sv | |
| parent | dc705df98037bfd9db8efded025651b676e87754 (diff) | |
rtl/perf: implement performance unit
Diffstat (limited to 'rtl/cache/cache_control.sv')
| -rw-r--r-- | rtl/cache/cache_control.sv | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/rtl/cache/cache_control.sv b/rtl/cache/cache_control.sv index b31b6a8..64b4ce1 100644 --- a/rtl/cache/cache_control.sv +++ b/rtl/cache/cache_control.sv @@ -80,7 +80,7 @@ module cache_control assign mem_end = (mem_read || mem_write) && !mem_waitrequest; assign mem_wait = (mem_read || mem_write) && mem_waitrequest; - assign mem_address = {3'b000, mem_tag, mem_index, 4'b0000}; + assign mem_address = {`IO_CACHED, mem_tag, mem_index, 4'b0000}; assign mem_read_end = mem_read && !mem_waitrequest; /* Desbloquear la línea hasta que la request del core termine garantiza |