diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-11-12 21:25:37 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-11-13 05:54:44 -0600 |
| commit | 9a1dd87d89d3cb57fe0d811e462b9348234eae79 (patch) | |
| tree | f93aa77748527ecedcc18bae629b8d81a7eb0a4d /rtl/bus_master.sv | |
| parent | 7d171c1e3ae6dab855ee264e7926281c3a4d25ca (diff) | |
Route cpu_rst_n signal through bus master
Diffstat (limited to 'rtl/bus_master.sv')
| -rw-r--r-- | rtl/bus_master.sv | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/rtl/bus_master.sv b/rtl/bus_master.sv index 0a2f2ea..c61a208 100644 --- a/rtl/bus_master.sv +++ b/rtl/bus_master.sv @@ -10,6 +10,7 @@ module bus_master output logic[31:0] data_rd, input logic[31:0] data_wr, output logic cpu_clk, + cpu_rst_n, irq, output logic[31:0] avl_address, @@ -29,6 +30,7 @@ module bus_master assign irq = avl_irq; assign cpu_clk = clk; + assign cpu_rst_n = rst_n; assign data_rd = avl_readdata; assign avl_byteenable = 4'b1111; //TODO |