platform/wavelet3d: implement sched domain crossbar

7 files changed, 293 insertions, 33 deletions

diff --git a/platform/wavelet3d/gfx_axil2regblock.sv b/platform/wavelet3d/gfx_axil2regblock.sv
new file mode 100644
index 0000000..2449b05
--- /dev/null
+++ b/platform/wavelet3d/gfx_axil2regblock.sv
@@ -0,0 +1,30 @@
+module gfx_axil2regblock
+(
+	gfx_axil.s           axis,
+	axi4lite_intf.master axim
+);
+
+	assign axis.rdata = axim.RDATA;
+	assign axis.rvalid = axim.RVALID;
+	assign axis.bvalid = axim.BVALID;
+	assign axis.wready = axim.WREADY;
+	assign axis.arready = axim.ARREADY;
+	assign axis.awready = axim.AWREADY;
+
+    assign axim.AWVALID = axis.awvalid;
+    assign axim.AWADDR = axis.awaddr[$bits(axim.AWADDR) - 1:0];
+    assign axim.AWPROT = '0;
+
+    assign axim.WVALID = axis.wvalid;
+    assign axim.WDATA = axis.wdata;
+    assign axim.WSTRB = '1;
+
+    assign axim.BREADY = axis.bready;
+
+    assign axim.ARVALID = axis.arvalid;
+    assign axim.ARADDR = axis.araddr[$bits(axim.ARADDR) - 1:0];
+    assign axim.ARPROT = '0;
+
+    assign axim.RREADY = axis.rready;
+
+endmodule
diff --git a/platform/wavelet3d/gfx_bootrom.sv b/platform/wavelet3d/gfx_bootrom.sv
new file mode 100644
index 0000000..2c4581e
--- /dev/null
+++ b/platform/wavelet3d/gfx_bootrom.sv
@@ -0,0 +1,66 @@
+module gfx_bootrom
+import gfx::*;
+(
+	input  logic      clk,
+	                  rst_n,
+
+	       gfx_axil.s axis
+);
+
+	localparam ROM_WORDS_LOG = 8;
+
+	enum int unsigned
+	{
+		WAIT,
+		READ,
+		RDATA,
+		READY
+	} state;
+
+	word read, rom[1 << ROM_WORDS_LOG];
+	logic[ROM_WORDS_LOG - 1:0] read_addr;
+
+	assign axis.bvalid = 0;
+	assign axis.wready = 0;
+	assign axis.awready = 0;
+
+	always_ff @(posedge clk or negedge rst_n)
+		if (~rst_n) begin
+			state <= WAIT;
+			axis.rvalid <= 0;
+			axis.arready <= 0;
+		end else begin
+			axis.arready <= 0;
+
+			unique case (state)
+				WAIT:
+					if (axis.arvalid & ~axis.arready)
+						state <= READ;
+
+				READ:
+					state <= RDATA;
+
+				RDATA: begin
+					state <= READY;
+					axis.rvalid <= 1;
+				end
+
+				READY:
+					if (axis.rready) begin
+						state <= WAIT;
+						axis.rvalid <= 0;
+						axis.arready <= 1;
+					end
+			endcase
+		end
+
+	always_ff @(posedge clk) begin
+		read <= rom[read_addr];
+		read_addr <= axis.araddr[$bits(read_addr) + SUBWORD_BITS - 1:SUBWORD_BITS];
+		axis.rdata <= read;
+	end
+
+	initial
+		$readmemh("gfx_bootrom.hex", rom);
+
+endmodule
diff --git a/platform/wavelet3d/gfx_rst_sync.sv b/platform/wavelet3d/gfx_rst_sync.sv
new file mode 100644
index 0000000..2a8ea3b
--- /dev/null
+++ b/platform/wavelet3d/gfx_rst_sync.sv
@@ -0,0 +1,13 @@
+//FIXME: peligro
+module gfx_rst_sync
+(
+	input  logic clk,
+	             rst_n,
+
+	output logic srst_n
+);
+
+	always_ff @(posedge clk or negedge rst_n)
+		srst_n <= ~rst_n ? 0 : 1;
+
+endmodule
diff --git a/platform/wavelet3d/gfx_sched.sv b/platform/wavelet3d/gfx_sched.sv
index ebffd1a..b3cbc41 100644
--- a/platform/wavelet3d/gfx_sched.sv
+++ b/platform/wavelet3d/gfx_sched.sv
@@ -1,17 +1,17 @@
 module gfx_sched
+import gfx::*;
 (
-	input  logic          clk,
-	                      rst_n,
+	input  logic      clk,
+	                  rst_n,
+	                  srst_n,
 
-	       gfx_axil.m     axim,
-	input  gfx::irq_lines irq
-);
+	       gfx_axil.m axim,
 
-	import gfx::*;
+	input  irq_lines  irq
+);
 
 	logic axi_ready, axi_valid, bram_ready, bram_read, bram_write, bram_write_next,
-	      mem_instr, mem_la_read, mem_la_write, mem_ready, mem_valid,
-	      sync_rst_n, rst_done, select_bram;
+	      mem_instr, mem_la_read, mem_la_write, mem_ready, mem_valid, select_bram;
 
 	word bram[SCHED_BRAM_WORDS];
 	word axi_rdata, bram_rdata, mem_addr, mem_la_addr, mem_rdata, mem_wdata;
@@ -22,7 +22,7 @@ module gfx_sched
 	assign bram_addr = mem_addr[$bits(bram_addr) + SUBWORD_BITS - 1:SUBWORD_BITS];
 	assign mem_ready = (axi_valid & axi_ready) | bram_ready;
 	assign mem_rdata = bram_ready ? bram_rdata : axi_rdata;
-	assign select_bram = ~|(mem_la_addr & ~((1 << ($bits(bram_addr) + SUBWORD_BITS)) - 1));
+	assign select_bram = ~|mem_la_addr[$bits(mem_la_addr) - 1:$bits(bram_addr) + SUBWORD_BITS];
 	assign bram_write_next = mem_la_write & select_bram;
 
 	defparam core.ENABLE_COUNTERS   = 0;
@@ -40,7 +40,7 @@ module gfx_sched
 	picorv32 core
 	(
 		.clk,
-		.resetn(sync_rst_n),
+		.resetn(srst_n),
 		.trap(),
 
 		.mem_valid,
@@ -77,7 +77,7 @@ module gfx_sched
 	picorv32_axi_adapter axi
 	(
 		.clk,
-		.resetn(sync_rst_n),
+		.resetn(srst_n),
 
 		.mem_axi_awvalid(axim.awvalid),
 		.mem_axi_awready(axim.awready),
@@ -123,20 +123,12 @@ module gfx_sched
 
 
 	always_ff @(posedge clk or negedge rst_n)
-		if (!rst_n) begin
-			rst_done <= 0;
-			sync_rst_n <= 0;
-
+		if (~rst_n) begin
 			axi_valid <= 0;
 			bram_read <= 0;
 			bram_ready <= 0;
 			bram_write <= 0;
 		end else begin
-			if (rst_done)
-				sync_rst_n <= 1;
-			else
-				rst_done <= 1;
-
 			axi_valid <= ~select_bram | (axi_valid & ~axi_ready);
 			bram_read <= mem_la_read & select_bram;
 			bram_write <= bram_write_next;
diff --git a/platform/wavelet3d/gfx_shader.sv b/platform/wavelet3d/gfx_shader.sv
index 3be6ed4..f8432c9 100644
--- a/platform/wavelet3d/gfx_shader.sv
+++ b/platform/wavelet3d/gfx_shader.sv
@@ -2,14 +2,22 @@ module gfx_shader
 import gfx::*;
 import gfx_shader_schedif_pkg::*;
 (
-	input  logic               clk,
-	                           rst_n,
+	input  logic      clk,
+	                  rst_n,
 
-	       gfx_axib.m          insn_mem,
+	       gfx_axib.m insn_mem,
 
-	       axi4lite_intf.slave sched
+	       gfx_axil.s sched
 );
 
+	axi4lite_intf #(.ADDR_WIDTH(4)) regblock();
+
+	gfx_axil2regblock axil2regblock
+	(
+		.axis(sched),
+		.axim(regblock.master)
+	);
+
 	gfx_shader_schedif__in_t schedif_in;
 	gfx_shader_schedif__out_t schedif_out;
 
@@ -46,7 +54,7 @@ import gfx_shader_schedif_pkg::*;
 	(
 		.clk,
 		.arst_n(rst_n),
-		.s_axil(sched),
+		.s_axil(regblock.slave),
 		.hwif_in(schedif_in),
 		.hwif_out(schedif_out)
 	);
diff --git a/platform/wavelet3d/gfx_top.sv b/platform/wavelet3d/gfx_top.sv
index b6538d7..8f453a0 100644
--- a/platform/wavelet3d/gfx_top.sv
+++ b/platform/wavelet3d/gfx_top.sv
@@ -41,13 +41,13 @@ import gfx::*;
 	output word  raster_tdata
 );
 
+	logic srst_n;
+
 	gfx_wb fpint_wb();
 	gfx_axib insn_mem();
-	gfx_axil sched_axi();
 	gfx_pkts geometry(), coverage();
 	gfx_regfile_io fpint_io();
-
-	axi4lite_intf #(.ADDR_WIDTH(4)) core_sched();
+	gfx_axil bootrom_axi(), sched_axi(), shader_0_axi();
 
 	assign q = fpint_wb.rx.lanes;
 	assign out_valid = fpint_wb.rx.valid;
@@ -87,6 +87,13 @@ import gfx::*;
 	assign fpint_io.regs.a = a;
 	assign fpint_io.regs.b = b;
 
+	gfx_rst_sync rst_sync
+	(
+		.clk,
+		.rst_n,
+		.srst_n
+	);
+
 	gfx_fpint fpint
 	(
 		.clk,
@@ -102,24 +109,41 @@ import gfx::*;
 	(
 		.clk,
 		.rst_n,
+		.srst_n,
 		.irq(0),
 		.axim(sched_axi.m)
 	);
 
-	gfx_raster raster
+	gfx_bootrom bootrom
 	(
 		.clk,
 		.rst_n,
-		.geometry(geometry.rx),
-		.coverage(coverage.tx)
+		.axis(bootrom_axi.s)
 	);
 
-	gfx_shader shader
+	gfx_shader shader_0
 	(
 		.clk,
 		.rst_n,
-		.sched(core_sched.slave),
+		.sched(shader_0_axi.s),
 		.insn_mem(insn_mem.m)
 	);
 
+	gfx_xbar_sched xbar
+	(
+		.clk,
+		.srst_n,
+		.sched(sched_axi.s),
+		.bootrom(bootrom_axi.m),
+		.shader_0(shader_0_axi.m)
+	);
+
+	gfx_raster raster
+	(
+		.clk,
+		.rst_n,
+		.geometry(geometry.rx),
+		.coverage(coverage.tx)
+	);
+
 endmodule
diff --git a/platform/wavelet3d/gfx_xbar_sched.sv b/platform/wavelet3d/gfx_xbar_sched.sv
new file mode 100644
index 0000000..f2bd9f9
--- /dev/null
+++ b/platform/wavelet3d/gfx_xbar_sched.sv
@@ -0,0 +1,127 @@
+module gfx_xbar_sched
+import gfx::*;
+(
+	input  logic      clk,
+	                  srst_n,
+
+	       gfx_axil.s sched,
+	       gfx_axil.m bootrom,
+	       gfx_axil.m shader_0
+);
+
+	localparam word BOOTROM_BASE  = 32'h0008_0000;
+	localparam word BOOTROM_MASK  = 32'hfff8_0000;
+	localparam word SHADER_0_BASE = 32'h0010_0000;
+	localparam word SHADER_0_MASK = 32'hfff0_0000;
+
+	defparam xbar.NM = 1; 
+	defparam xbar.NS = 2; 
+	defparam xbar.OPT_LOWPOWER = 0; 
+
+	defparam xbar.SLAVE_ADDR = {
+		SHADER_0_BASE,
+		BOOTROM_BASE
+	};
+
+	defparam xbar.SLAVE_MASK = {
+		SHADER_0_MASK,
+		BOOTROM_MASK
+	};
+
+	axilxbar xbar
+	(
+		.S_AXI_ACLK(clk),
+		.S_AXI_ARESETN(srst_n),
+
+		.S_AXI_AWVALID(sched.awvalid),
+		.S_AXI_AWREADY(sched.awready),
+		.S_AXI_AWADDR(sched.awaddr),
+		.S_AXI_AWPROT('0),
+
+		.S_AXI_WVALID(sched.wvalid),
+		.S_AXI_WREADY(sched.wready),
+		.S_AXI_WDATA(sched.wdata),
+		.S_AXI_WSTRB('1),
+
+		.S_AXI_BVALID(sched.bvalid),
+		.S_AXI_BREADY(sched.bready),
+		.S_AXI_BRESP(),
+
+		.S_AXI_ARVALID(sched.arvalid),
+		.S_AXI_ARREADY(sched.arready),
+		.S_AXI_ARADDR(sched.araddr),
+		.S_AXI_ARPROT('0),
+
+		.S_AXI_RVALID(sched.rvalid),
+		.S_AXI_RREADY(sched.rready),
+		.S_AXI_RDATA(sched.rdata),
+		.S_AXI_RRESP(),
+
+		.M_AXI_AWADDR({
+			shader_0.awaddr,
+			bootrom.awaddr
+		}),
+		.M_AXI_AWPROT(),
+		.M_AXI_AWVALID({
+			shader_0.awvalid,
+			bootrom.awvalid
+		}),
+		.M_AXI_AWREADY({
+			shader_0.awready,
+			bootrom.awready
+		}),
+
+		.M_AXI_WDATA({
+			shader_0.wdata,
+			bootrom.wdata
+		}),
+		.M_AXI_WSTRB(),
+		.M_AXI_WVALID({
+			shader_0.wvalid,
+			bootrom.wvalid
+		}),
+		.M_AXI_WREADY({
+			shader_0.wready,
+			bootrom.wready
+		}),
+
+		.M_AXI_BRESP('0),
+		.M_AXI_BVALID({
+			shader_0.bvalid,
+			bootrom.bvalid
+		}),
+		.M_AXI_BREADY({
+			shader_0.bready,
+			bootrom.bready
+		}),
+
+		.M_AXI_ARADDR({
+			shader_0.araddr,
+			bootrom.araddr
+		}),
+		.M_AXI_ARPROT(),
+		.M_AXI_ARVALID({
+			shader_0.arvalid,
+			bootrom.arvalid
+		}),
+		.M_AXI_ARREADY({
+			shader_0.arready,
+			bootrom.arready
+		}),
+
+		.M_AXI_RDATA({
+			shader_0.rdata,
+			bootrom.rdata
+		}),
+		.M_AXI_RRESP('0),
+		.M_AXI_RVALID({
+			shader_0.rvalid,
+			bootrom.rvalid
+		}),
+		.M_AXI_RREADY({
+			shader_0.rready,
+			bootrom.rready
+		})
+	);
+
+endmodule