diff options
| author | Alejandro Soto <alejandro@34project.org> | 2024-03-08 22:15:07 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2024-03-08 22:15:07 -0600 |
| commit | e11fd369080e7d9b54f1a640c78fb4a1484cb2d6 (patch) | |
| tree | 53c1b6e76eddad2497470a16818cdfdf4b1e745e /platform/wavelet3d/gfx_fpint.sv | |
| parent | 9456d0f772502c4d9891f35cdc433da8332f55ea (diff) | |
platform/wavelet3d: implement fpint lanes
Diffstat (limited to 'platform/wavelet3d/gfx_fpint.sv')
| -rw-r--r-- | platform/wavelet3d/gfx_fpint.sv | 103 |
1 files changed, 60 insertions, 43 deletions
diff --git a/platform/wavelet3d/gfx_fpint.sv b/platform/wavelet3d/gfx_fpint.sv index babc916..e5c457c 100644 --- a/platform/wavelet3d/gfx_fpint.sv +++ b/platform/wavelet3d/gfx_fpint.sv @@ -1,34 +1,39 @@ module gfx_fpint ( - input logic clk, + input logic clk, + rst_n, - input gfx::word a, - b, - input logic setup_mul_float, - setup_unit_b, - mnorm_put_hi, - mnorm_put_lo, - mnorm_put_mul, - mnorm_zero_b, - mnorm_zero_flags, - minmax_copy_flags, - shiftr_int_signed, - addsub_copy_flags, - addsub_int_operand, - clz_force_nop, - shiftl_copy_flags, - round_copy_flags, - round_enable, - encode_enable, + input gfx::word a[gfx::SHADER_LANES], + b[gfx::SHADER_LANES], + input logic in_valid, + setup_mul_float, + setup_unit_b, + mnorm_put_hi, + mnorm_put_lo, + mnorm_put_mul, + mnorm_zero_b, + mnorm_zero_flags, + minmax_copy_flags, + shiftr_int_signed, + addsub_copy_flags, + addsub_int_operand, + clz_force_nop, + shiftl_copy_flags, + round_copy_flags, + round_enable, + encode_enable, - output gfx::word q + output logic out_valid, + output gfx::word q[gfx::SHADER_LANES] ); import gfx::*; + logic stage_valid[FPINT_STAGES]; fpint_op op, stage_op[FPINT_STAGES]; assign stage_op[0] = op; + assign stage_valid[0] = in_valid; assign op.setup_mul_float = setup_mul_float; assign op.setup_unit_b = setup_unit_b; @@ -47,32 +52,44 @@ module gfx_fpint assign op.round_enable = round_enable; assign op.encode_enable = encode_enable; - gfx_fpint_lane lane - ( - .clk(clk), - .a(a), - .b(b), - .q(q), - .mul_float_0(stage_op[0].setup_mul_float), - .unit_b_0(stage_op[0].setup_unit_b), - .put_hi_2(stage_op[2].mnorm_put_hi), - .put_lo_2(stage_op[2].mnorm_put_lo), - .put_mul_2(stage_op[2].mnorm_put_mul), - .zero_b_2(stage_op[2].mnorm_zero_b), - .zero_flags_2(stage_op[2].mnorm_zero_flags), - .copy_flags_3(stage_op[3].minmax_copy_flags), - .int_signed_5(stage_op[5].shiftr_int_signed), - .copy_flags_6(stage_op[6].addsub_copy_flags), - .int_operand_6(stage_op[6].addsub_int_operand), - .force_nop_7(stage_op[7].clz_force_nop), - .copy_flags_11(stage_op[11].shiftl_copy_flags), - .copy_flags_12(stage_op[12].round_copy_flags), - .enable_12(stage_op[12].round_enable), - .enable_14(stage_op[14].encode_enable) - ); + genvar lane; + generate + for (lane = 0; lane < SHADER_LANES; ++lane) begin: lanes + gfx_fpint_lane unit + ( + .clk(clk), + .a(a[lane]), + .b(b[lane]), + .q(q[lane]), + .mul_float_0(stage_op[0].setup_mul_float), + .unit_b_0(stage_op[0].setup_unit_b), + .put_hi_2(stage_op[2].mnorm_put_hi), + .put_lo_2(stage_op[2].mnorm_put_lo), + .put_mul_2(stage_op[2].mnorm_put_mul), + .zero_b_2(stage_op[2].mnorm_zero_b), + .zero_flags_2(stage_op[2].mnorm_zero_flags), + .copy_flags_3(stage_op[3].minmax_copy_flags), + .int_signed_5(stage_op[5].shiftr_int_signed), + .copy_flags_6(stage_op[6].addsub_copy_flags), + .int_operand_6(stage_op[6].addsub_int_operand), + .force_nop_7(stage_op[7].clz_force_nop), + .copy_flags_11(stage_op[11].shiftl_copy_flags), + .copy_flags_12(stage_op[12].round_copy_flags), + .enable_12(stage_op[12].round_enable), + .enable_14(stage_op[14].encode_enable) + ); + end + endgenerate always_ff @(posedge clk) for (int i = 1; i < FPINT_STAGES; ++i) stage_op[i] <= stage_op[i - 1]; + always_ff @(posedge clk or negedge rst_n) begin + for (int i = 1; i < FPINT_STAGES; ++i) + stage_valid[i] <= !rst_n ? 0 : stage_valid[i - 1]; + + out_valid <= !rst_n ? 0 : stage_valid[FPINT_STAGES - 1]; + end + endmodule |
